參數(shù)資料
型號(hào): EPF8282ATC100-4N
廠商: Altera
文件頁數(shù): 10/62頁
文件大?。?/td> 0K
描述: IC FLEX 8000A FPGA 2.5K 100-TQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 270
系列: FLEX 8000
LAB/CLB數(shù): 26
邏輯元件/單元數(shù): 208
輸入/輸出數(shù): 78
門數(shù): 2500
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 100-TQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
產(chǎn)品目錄頁面: 602 (CN2011-ZH PDF)
其它名稱: 544-2255
18
Altera Corporation
FLEX 8000 Programmable Logic Device Family Data Sheet
Figure 9. FLEX 8000 Device Interconnect Resources
Each LAB is named according to its physical row (A, B, C, etc.) and column (1, 2, 3, etc.) position within the device.
I/O Element
An IOE contains a bidirectional I/O buffer and a register that can be used
either as an input register for external data that requires a fast setup time,
or as an output register for data that requires fast clock-to-output
performance. IOEs can be used as input, output, or bidirectional pins. The
MAX+PLUS II Compiler uses the programmable inversion option to
automatically invert signals from the row and column interconnect where
appropriate. Figure 10 shows the IOE block diagram.
IOE
LAB
A1
LAB
A2
LAB
B1
LAB
B2
LAB Local
Interconnect
Column
Interconnect
Row
Interconnect
Cascade &
Carry Chain
IOE
See Figure 11
for details.
See Figure 12
for details.
1
8
1
8
1
8
IOE
1
8
IOE
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