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  • 參數(shù)資料
    型號: EPF6024AQC240-2N
    廠商: Altera
    文件頁數(shù): 52/52頁
    文件大?。?/td> 0K
    描述: IC FLEX 6000 FPGA 24K 240-PQFP
    產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
    標(biāo)準(zhǔn)包裝: 96
    系列: FLEX 6000
    LAB/CLB數(shù): 196
    邏輯元件/單元數(shù): 1960
    輸入/輸出數(shù): 199
    門數(shù): 24000
    電源電壓: 3 V ~ 3.6 V
    安裝類型: 表面貼裝
    工作溫度: 0°C ~ 85°C
    封裝/外殼: 240-BFQFP
    供應(yīng)商設(shè)備封裝: 240-PQFP(32x32)
    Altera Corporation
    9
    FLEX 6000 Programmable Logic Device Family Data Sheet
    Figure 4. Logic Element
    The programmable flipflop in the LE can be configured for D, T, JK, or SR
    operation. The clock and clear control signals on the flipflop can be driven
    by global signals, general-purpose I/O pins, or any internal logic. For
    combinatorial functions, the flipflop is bypassed and the output of the
    LUT drives the outputs of the LE. The LE output can drive both the local
    interconnect and the FastTrack Interconnect.
    The FLEX 6000 architecture provides two types of dedicated high-speed
    data paths that connect adjacent LEs without using local interconnect
    paths: carry chains and cascade chains. A carry chain supports high-speed
    arithmetic functions such as counters and adders, while a cascade chain
    implements wide-input functions such as equivalent comparators with
    minimum delay. Carry and cascade chains connect LEs 2 through 10 in an
    LAB and all LABs in the same half of the row. Because extensive use of
    carry and cascade chains can reduce routing flexibility, these chains
    should be limited to speed-critical portions of a design.
    Chip-Wide Reset
    Carry-In
    Clock
    Select
    Carry-Out
    Look-Up
    T
    able
    (LUT)
    Clear/ Preset
    Logic
    Carry
    Chain
    Cascade
    Chain
    Cascade-In
    Cascade-Out
    LE-Out
    Programmable
    Register
    PRN
    CLRN
    DQ
    Register Bypass
    data1
    data2
    data3
    data4
    labctrl1
    labctrl2
    labctrl3
    labctrl4
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    EPF6024AQC240-3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 6000 196 LABs 199 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
    EPF6024AQC240-3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 6000 196 LABs 199 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
    EPF6024AQI2083 制造商:Altera Corporation 功能描述:
    EPF6024AQI208-3 功能描述:IC FLEX 6000 FPGA 24K 208-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:FLEX 6000 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)
    EPF6024ATC100-2 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic Device Family