tOD3 4.7 5.2 ns
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� EPF6024AQC208-3
寤犲晢锛� Altera
鏂囦欢闋佹暩(sh霉)锛� 39/52闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FLEX 6000 FPGA 24K 208-PQFP
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Three Reasons to Use FPGA's in Industrial Designs
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 144
绯诲垪锛� FLEX 6000
LAB/CLB鏁�(sh霉)锛� 196
閭忚集鍏冧欢/鍠厓鏁�(sh霉)锛� 1960
杓稿叆/杓稿嚭鏁�(sh霉)锛� 171
闁€鏁�(sh霉)锛� 24000
闆绘簮闆诲锛� 3 V ~ 3.6 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 85°C
灏佽/澶栨锛� 208-BFQFP
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 208-PQFP锛�28x28锛�
鍏跺畠鍚嶇ū锛� 544-1285
44
Altera Corporation
FLEX 6000 Programmable Logic Device Family Data Sheet
tOD3
4.7
5.2
ns
tXZ
2.3
2.8
ns
tZX1
2.3
2.8
ns
tZX2
4.6
5.1
ns
tZX3
4.7
5.2
ns
tIOE
0.5
0.6
ns
tIN
3.3
4.0
ns
tIN_DELAY
4.6
5.6
ns
Table 31. Interconnect Timing Microparameters for EPF6016 Devices
Parameter
Speed Grade
Unit
-2
-3
Min
Max
Min
Max
tLOCAL
0.8
1.0
ns
tROW
2.9
3.3
ns
tCOL
2.3
2.5
ns
tDIN_D
4.9
6.0
ns
tDIN_C
4.8
6.0
ns
tLEGLOBAL
3.1
3.9
ns
tLABCARRY
0.4
0.5
ns
tLABCASC
0.8
1.0
ns
Table 32. External Reference Timing Parameters for EPF6016 Devices
Parameter
Speed Grade
Unit
-2
-3
Min
Max
Min
Max
t1
53.0
65.0
ns
tDRR
16.0
20.0
ns
Table 30. IOE Timing Microparameters for EPF6016 Devices
Parameter
Speed Grade
Unit
-2
-3
Min
Max
Min
Max
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
R1EX25032ASA00A#S0 IC EEPROM 32K 5MHZ 8SOP
A40MX02-2PL44 IC FPGA MX SGL CHIP 3K 44-PLCC
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EPF6024AQC208-3N 鍔熻兘鎻忚堪:FPGA - 鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪 FPGA - Flex 6000 196 LABs 171 IOs RoHS:鍚� 鍒堕€犲晢:Altera Corporation 绯诲垪:Cyclone V E 鏌垫サ鏁�(sh霉)閲�: 閭忚集濉婃暩(sh霉)閲�:943 鍏�(n猫i)宓屽紡濉奟AM - EBR:1956 kbit 杓稿叆/杓稿嚭绔暩(sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:800 MHz 宸ヤ綔闆绘簮闆诲:1.1 V 鏈€澶у伐浣滄韩搴�:+ 70 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-256
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