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參數(shù)資料
| 型號： | EPF6010ATC144-1 |
| 廠商： | Altera |
| 文件頁數(shù)： | 10/52頁 |
| 文件大小： | 0K |
| 描述： | IC FLEX 6000 FPGA 10K 144-TQFP |
| 產(chǎn)品培訓模塊： | Three Reasons to Use FPGA's in Industrial Designs |
| 標準包裝： | 180 |
| 系列： | FLEX 6000 |
| LAB/CLB數(shù)： | 88 |
| 邏輯元件/單元數(shù)： | 880 |
| 輸入/輸出數(shù)： | 102 |
| 門數(shù)： | 10000 |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 85°C |
| 封裝/外殼： | 144-LQFP |
| 供應商設備封裝： | 144-TQFP（20x20） |
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18
Altera Corporation
FLEX 6000 Programmable Logic Device Family Data Sheet
The FastTrack Interconnect consists of column and row interconnect
channels that span the entire device. Each row of LABs is served by a
dedicated row interconnect, which routes signals between LABs in the
same row, and also routes signals from I/O pins to LABs. Additionally,
the local interconnect routes signals between LEs in the same LAB and in
adjacent LABs. The column interconnect routes signals between rows and
routes signals from I/O pins to rows.
LEs 1 through 5 of an LAB drive the local interconnect to the right, while
LEs 6 through 10 drive the local interconnect to the left. The DATA1 and
DATA3
inputs of each LE are driven by the local interconnect to the left;
DATA2
and DATA4 are driven by the local interconnect to the right. The
local interconnect also routes signals from LEs to I/O pins. Figure 9 shows
an overview of the FLEX 6000 interconnect architecture. LEs in the first
and last columns have drivers on both sides so that all LEs in the LAB can
drive I/O pins via the local interconnect.
Figure 9. FastTrack Interconnect Architecture
Note:
(1)
For EPF6010A, EPF6016, and EPF6016A devices, n = 144 channels and m = 20 channels; for EPF6024A devices,
n = 186 channels and m = 30 channels.
2
10
20
5
10
Column Interconnect (m Channels) (1)
Local Interconnect (32 Channels)
To/From
Adjacent
LAB
LE 1
through
LE 5
LE 6
through
LE 10
LE 1
through
LE 5
LE 6
through
LE 10
2
22
10
5
20
5
To/From
Adjacent
LAB
5
10
5
10
Row Interconnect (n Channels) (1)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EPF6010ATC144-2 | 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 6000 88 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EPF6010ATC144-2N | 制造商:Altera Corporation 功能描述:FPGA FLEX 6000 Family 10K Gates 880 Cells 166.67MHz CMOS Technology 3.3V 144-Pin TQFP |
| EPF6010ATC144-3 | 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 6000 88 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EPF6010ATC144-3N | 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 6000 88 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EPF6010ATI100-2 | 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 6000 88 LABs 71 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256 |
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