參數(shù)資料
型號(hào): EPF6010ATC100-1N
廠商: Altera
文件頁(yè)數(shù): 18/52頁(yè)
文件大?。?/td> 0K
描述: IC FLEX 6000 FPGA 10K 100-TQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 270
系列: FLEX 6000
LAB/CLB數(shù): 88
邏輯元件/單元數(shù): 880
輸入/輸出數(shù): 71
門(mén)數(shù): 10000
電源電壓: 3 V ~ 3.6 V
安裝類(lèi)型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 100-TQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
Altera Corporation
25
FLEX 6000 Programmable Logic Device Family Data Sheet
Figure 14. IOE Connection to Column Interconnect
SameFrame
Pin-Outs
3.3-V FLEX 6000 devices support the SameFrame pin-out feature for
FineLine BGA packages. The SameFrame pin-out feature is the
arrangement of balls on FineLine BGA packages such that the lower-ball-
count packages form a subset of the higher-ball-count packages.
SameFrame pin-outs provide the flexibility to migrate not only from
device to device within the same package, but also from one package to
another. A given printed circuit board (PCB) layout can support multiple
device density/package combinations. For example, a single board layout
can support an EPF6016A device in a 100-pin FineLine BGA package or an
EPF6024A device in a 256-pin FineLine BGA package.
The Altera software packages provide support to design PCBs with
SameFrame pin-out devices. Devices can be defined for present and future
use. The Altera software packages generate pin-outs describing how to lay
out a board to take advantage of this migration (see Figure 15).
Row Interconnect
Column Interconnect
Each IOE can drive two
column interconnect channels.
Each IOE data and OE signal is
driven to a local interconnect.
Any LE can drive a
pin through the row
and local interconnect.
IOE
LAB
FastFLEX I/O: An
LE can drive a
pin through a local
interconnect for faster
clock-to-output times.
相關(guān)PDF資料
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EPF6010ATC100-1 IC FLEX 6000 FPGA 10K 100-TQFP
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ABM44DSEN-S243 CONN EDGECARD 88POS .156 EYELET
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參數(shù)描述
EPF6010ATC100-2 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Flex 6000 88 LABs 71 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6010ATC100-2N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Flex 6000 88 LABs 71 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6010ATC100-3 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Flex 6000 88 LABs 71 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6010ATC100-3N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Flex 6000 88 LABs 71 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6010ATC144-1 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Flex 6000 88 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256