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參數(shù)資料

型號：	EPF10K30EQC208-2
廠商：	Altera
文件頁數(shù)：	8/100頁
文件大?。?/td>	0K
描述：	IC FLEX 10KE FPGA 30K 208-PQFP
產(chǎn)品培訓(xùn)模塊：	Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝：	72
系列：	FLEX-10KE®
LAB/CLB數(shù)：	216
邏輯元件/單元數(shù)：	1728
RAM 位總計：	24576
輸入/輸出數(shù)：	147
門數(shù)：	119000
電源電壓：	2.375 V ~ 2.625 V
安裝類型：	表面貼裝
工作溫度：	0°C ~ 85°C
封裝/外殼：	208-BFQFP
供應(yīng)商設(shè)備封裝：	208-PQFP（28x28）
其它名稱：	544-2225

Altera Corporation

FLEX 10KE Embedded Programmable Logic Devices Data Sheet

EABs provide flexible options for driving and controlling clock signals.

Different clocks and clock enables can be used for reading and writing to

the EAB. Registers can be independently inserted on the data input, EAB

output, write address, write enable signals, read address, and read enable

signals. The global signals and the EAB local interconnect can drive write

enable, read enable, and clock enable signals. The global signals,

dedicated clock pins, and EAB local interconnect can drive the EAB clock

signals. Because the LEs drive the EAB local interconnect, the LEs can

control write enable, read enable, clear, clock, and clock enable signals.

An EAB is fed by a row interconnect and can drive out to row and column

interconnects. Each EAB output can drive up to two row channels and up

to two column channels; the unused row channel can be driven by other

LEs. This feature increases the routing resources available for EAB

outputs (see Figures 2 and 4). The column interconnect, which is adjacent

to the EAB, has twice as many channels as other columns in the device.

Logic Array Block

An LAB consists of eight LEs, their associated carry and cascade chains,

LAB control signals, and the LAB local interconnect. The LAB provides

the coarse-grained structure to the FLEX 10KE architecture, facilitating

efficient routing with optimum device utilization and high performance

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
EPF10K30EQC208-2DX	制造商:未知廠家制造商全稱:未知廠家功能描述:ASIC
EPF10K30EQC208-2N	功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 216 LABs 147 IOs RoHS:否制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K30EQC2082X	制造商:ALTERA 功能描述:New
EPF10K30EQC208-2X	功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 216 LABs 147 IOs RoHS:否制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K30EQC208-3	功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 216 LABs 147 IOs RoHS:否制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256

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