Notes to tables: (1) See the Operating Requirements for " />
參數(shù)資料
型號： EPF10K20TI144-4N
廠商： Altera
文件頁數(shù)： 78/128頁
文件大?。?/td> 0K
描述： IC FLEX 10K FPGA 20K 144-TQFP
產(chǎn)品培訓(xùn)模塊： Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝： 60
系列： FLEX-10K®
LAB/CLB數(shù)： 144
邏輯元件/單元數(shù)： 1152
RAM 位總計： 12288
輸入/輸出數(shù)： 102
門數(shù)： 63000
電源電壓： 4.5 V ~ 5.5 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 144-LQFP
供應(yīng)商設(shè)備封裝： 144-TQFP（20x20）
其它名稱： 544-2221
Altera Corporation
53
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
(2)
Minimum DC voltage input is –0.5 V. During transitions, the inputs may undershoot to –2.0 V or overshoot to 5.75 V
for input currents less than 100 mA and periods shorter than 20 ns.
(3)
Numbers in parentheses are for industrial-temperature-range devices.
(4)
Maximum VCC rise time is 100 ms, and VCC must rise monotonically.
(5)
FLEX 10KA device inputs may be driven before VCCINT and VCCIO are powered.
(6)
Typical values are for T A = 25° C and VCC = 3.3 V.
(7)
These values are specified under the Recommended Operating Conditions shown in Table 27 on page 51.
(8)
The IOH parameter refers to high-level TTL, PCI, or CMOS output current.
(9)
The IOL parameter refers to low-level TTL, PCI, or CMOS output current. This parameter applies to open-drain pins
as well as output pins.
(10) This value is specified for normal device operation. The value may vary during power-up.
(11) This parameter applies to all -1 speed grade commercial temperature devices and all -2 speed grade
industrial-temperature devices.
(12) Capacitance is sample-tested only.
Table 29. 3.3-V Device Capacitance of EPF10K10A & EPF10K30A Devices
Symbol
Parameter
Conditions
Min
Max
Unit
CIN
Input capacitance
VIN = 0 V, f = 1.0 MHz
8
pF
CINCLK Input capacitance on dedicated
clock pin
VIN = 0 V, f = 1.0 MHz
12
pF
COUT
Output capacitance
VOUT = 0 V, f = 1.0 MHz
8
pF
Table 30. 3.3-V Device Capacitance of EPF10K100A Devices
Symbol
Parameter
Conditions
Min
Max
Unit
CIN
Input capacitance
VIN = 0 V, f = 1.0 MHz
10
pF
CINCLK Input capacitance on dedicated
clock pin
VIN = 0 V, f = 1.0 MHz
15
pF
COUT
Output capacitance
VOUT = 0 V, f = 1.0 MHz
10
pF
Table 31. 3.3-V Device Capacitance of EPF10K250A Devices
Symbol
Parameter
Conditions
Min
Max
Unit
CIN
Input capacitance
VIN = 0 V, f = 1.0 MHz
10
pF
CINCLK Input capacitance on dedicated
clock pin
VIN = 0 V, f = 1.0 MHz
15
pF
COUT
Output capacitance
VOUT = 0 V, f = 1.0 MHz
10
pF
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