
Altera Corporation
63
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
Figure 30. EAB Synchronous Timing Waveforms
Tables 31 through
37 show EPF10K30E device internal and external
timing parameters.
WE
CLK
EAB Synchronous Read
a0
d2
tEABDATASU
tEABRCREG
tEABDATACO
a1
a2
a3
d1
tEABDATAH
a0
WE
CLK
dout0
din1
din2
din3
din2
tEABWESU
tEABWCREG
tEABWEH
tEABDATACO
a1
a2
a3
a2
din3
din2
din1
tEABDATAH
tEABDATASU
EAB Synchronous Write (EAB Output Registers Used)
dout1
Address
Data-Out
Address
Data-Out
Data-In
Table 31. EPF10K30E Device LE Timing Microparameters (Part 1 of 2)
Symbol
-1 Speed Grade
-2 Speed Grade
-3 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
tLUT
0.7
0.8
1.1
ns
tCLUT
0.5
0.6
0.8
ns
tRLUT
0.6
0.7
1.0
ns
tPACKED
0.3
0.4
0.5
ns
tEN
0.6
0.8
1.0
ns
tCICO
0.1
0.2
ns
tCGEN
0.4
0.5
0.7
ns