
1–28
Chapter 1: Cyclone IV Device Datasheet
Switching Characteristics
December 2013
Altera Corporation
f For more information about the supported maximum clock rate, device and pin
1 Actual achievable frequency depends on design- and system-specific factors. Perform
HSPICE/IBIS simulations based on your specific design and system setup to
determine the maximum achievable frequency in your system.
High-Speed I/O Specifications
Table 1–31. RSDS Transmitter Timing Specifications for Cyclone IV
Devices (1),
(2),
(4) (Part 1 of 2)
Symbol
Modes
C6
C7, I7
C8, A7
C8L, I8L
C9L
Unit
Min
Typ
Max Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fHSCLK
(input clock
frequency)
×10
5
—
180
5
—
155.5
5
—
155.5
5
—
155.5
5
—
132.5
MHz
×8
5
—
180
5
—
155.5
5
—
155.5
5
—
155.5
5
—
132.5
MHz
×7
5
—
180
5
—
155.5
5
—
155.5
5
—
155.5
5
—
132.5
MHz
×4
5
—
180
5
—
155.5
5
—
155.5
5
—
155.5
5
—
132.5
MHz
×2
5
—
180
5
—
155.5
5
—
155.5
5
—
155.5
5
—
132.5
MHz
×1
5
—
360
5
—
311
5
—
311
5
—
311
5
—
265
MHz
Device
operation in
Mbps
×10
100
—
360
100
—
311
100
—
311
100
—
311
100
—
265
Mbps
×8
80
—
360
80
—
311
80
—
311
80
—
311
80
—
265
Mbps
×7
70
—
360
70
—
311
70
—
311
70
—
311
70
—
265
Mbps
×4
40
—
360
40
—
311
40
—
311
40
—
311
40
—
265
Mbps
×2
20
—
360
20
—
311
20
—
311
20
—
311
20
—
265
Mbps
×1
10
—
360
10
—
311
10
—
311
10
—
311
10
—
265
Mbps
tDUTY
—
45
—
55
45
—
55
45
—
55
45
—
55
45
—
55
%
Transmitter
channel-to-
channel skew
(TCCS)
—
200
—
200
—
200
—
200
—
200
ps
Output jitter
(peak to peak)
—
500
—
500
—
550
—
600
—
700
ps
tRISE
20 – 80%,
CLOAD =
5pF
—
500
—
500
—
500
—
500
—
500
—
ps
tFALL
20 – 80%,
CLOAD =
5pF
—
500
—
500
—
500
—
500
—
500
—
ps