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參數(shù)資料
| 型號： | EP3645TS-FREQ2TR |
| 廠商： | ECLIPTEK CORP |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 50 MHz - 106.25 MHz, HCMOS OUTPUT |
| 文件頁數(shù)： | 1/2頁 |
| 文件大?。?/td> | 147K |
| 代理商： | EP3645TS-FREQ2TR |
MANUFACTURER
CATEGORY
SERIES
PACKAGE
VOLTAGE
CLASS
REV
.DATE
ECLIPTEK CORP.
OSCILLATOR
EP36
CERAMIC
3.3V
OS89
01/04
EP36 Series
RoHS Compliant (Pb-Free)
EPO Programmable Oscillators
3.3V supply voltage
LVHCMOS output
Ceramic SMD package
Stability to ±50ppm
Available on tape and reel
OSCILLATOR
EP36
ELECTRICAL SPECIFICATIONS
800-ECLIPTEK www.ecliptek.com for latest revision
Specifications subject to change without notice.
H 1.3
L 5.0
W 3.2
Frequency Range
Operating Temperature Range
Storage Temperature Range
Supply Voltage (V
DD)
Input Current
Disable Current (TS Option)
Standby Current (PD Option)
Frequency Tolerance / Stability
Output Voltage Logic High (V
OH)
Output Voltage Logic Low (V
OL)
Rise Time / Fall Time
Duty Cycle
Load Drive Capability
Output Control Function
Output Control Function Input Voltage
Aging (at 25°C)
Start Up Time
Period Jitter: Absolute
Period Jitter: One Sigma
1.000MHz to 106.250MHz
-20°C to 70°C or -40°C to 85°C
-55°C to 125°C
3.3V
DC ±0.3VDC
28mA Maximum (Unloaded)
16mA Maximum (Pin 1=Ground)
20A Maximum (Pin 1=Ground)
±100ppm or ±50ppm Maximum
V
DD-0.4VDC Minimum
I
OH=-8mA
0.4V
DC Maximum
I
OL=+8mA
4 nSeconds Maximum
50 ±10(%) (Standard)
50 ±5(%) (Optional)
30pF HCMOS Load Maximum
15pF HCMOS Load Maximum
Tri-State
Power Down
Enables Output
Disable Output: High Impedance
Disable Output: Logic Low
±5ppm / year Maximum
10 mSeconds Maximum
±250pSec Maximum, ±100pSec Typical
±125pSec Maximum, ±75pSec Typical
±50pSec Maximum
±40pSec Maximum
Inclusive of all conditions: Calibration Tolerance at 25°C,
Frequency Stability over the Operating Temperature Range,
Supply Voltage Change, Output Load Change, First Year
Aging at 25°C, Shock, and Vibration
20% to 80% of waveform
at 50% of waveform
at 50% of waveform (<50.000MHz Only)
<50.000MHz
>50.000MHz
T S
PD
V
IH: No Connection or
≥70% of V
DD
V
IL: (TS Option) <20% of VDD
V
IL: (PD Option) <20% of VDD
<33.000MHz
>33.000MHz
<33.000MHz
>33.000MHz
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