參數(shù)資料
型號(hào): EP20K100FC324-3ES
英文描述: Monolithic 1A Step-Down Regulator with Low Quiescent Current; Temperature Range: -40°C to 85°C; Package: 10-MSOP T&R
中文描述: FPGA的
文件頁數(shù): 37/114頁
文件大小: 1623K
代理商: EP20K100FC324-3ES
Altera Corporation
29
APEX 20K Programmable Logic Device Family Data Sheet
Figure 16. APEX 20K Parallel Expanders
Embedded
System Block
The ESB can implement various types of memory blocks, including
dual-port RAM, ROM, FIFO, and CAM blocks. The ESB includes input
and output registers; the input registers synchronize writes, and the
output registers can pipeline designs to improve system performance. The
ESB offers a dual-port mode, which supports simultaneous reads and
writes at two different clock frequencies. Figure 17 shows the ESB block
diagram.
Figure 17. ESB Block Diagram
32 Signals from
Local Interconnect
To Next
Macrocell
From
Previous
Macrocell
Product-
Term
Select
Matrix
Product-
Term
Select
Matrix
Macrocell
Product-
Term Logic
Macrocell
Product-
Term Logic
Parallel Expander
Switch
Parallel Expander
Switch
wraddress[]
data[]
wren
inclock
inclocken
inaclr
rdaddress[]
q[]
rden
outclock
outclocken
outaclr
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP20K100FC324-3V 制造商:Rochester Electronics LLC 功能描述:- Bulk
EP20K100FI324-1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP20K100FI324-1ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K100FI324-2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP20K100FI324-2ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA