鍨嬭櫉(h脿o)锛� | EP1S30F1020C7N |
寤�(ch菐ng)鍟嗭細 | Altera |
鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 101/864闋�(y猫) |
鏂囦欢澶�?銆�?/td> | 0K |
鎻忚堪锛� | IC STRATIX FPGA 30K LE 1020-FBGA |
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Three Reasons to Use FPGA's in Industrial Designs |
鐢�(ch菐n)鍝佽畩鍖栭€氬憡锛� | Package Height Change 03/March/2008 |
妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 8 |
绯诲垪锛� | Stratix® |
LAB/CLB鏁�(sh霉)锛� | 3247 |
閭忚集鍏冧欢/鍠厓鏁�(sh霉)锛� | 32470 |
RAM 浣嶇附瑷�(j矛)锛� | 3317184 |
杓稿叆/杓稿嚭鏁�(sh霉)锛� | 726 |
闆绘簮闆诲锛� | 1.425 V ~ 1.575 V |
瀹夎椤�(l猫i)鍨嬶細 | 琛ㄩ潰璨艰 |
宸ヤ綔婧害锛� | 0°C ~ 85°C |
灏佽/澶栨锛� | 1020-BBGA |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 1020-FBGA锛�33x33锛� |
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
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EP1SGX25DF1020C7N | IC STRATIX GX FPGA 25K 1020-FBGA |
RCB100DHAD | CONN EDGECARD 200PS R/A .050 DIP |
EP2SGX30CF780C3 | IC STRATIX II GX 30K 780-FBGA |
A1280A-1PL84C | IC FPGA 8K GATES 84-PLCC COM |
DS2431G+U | IC EEPROM 1024BIT 2SFN |
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
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EP1S30F1020I6 | 鍔熻兘鎻忚堪:FPGA - 鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄e垪 FPGA - Stratix I 3247 LABs 726 IOs RoHS:鍚� 鍒堕€犲晢:Altera Corporation 绯诲垪:Cyclone V E 鏌垫サ鏁�(sh霉)閲�: 閭忚集濉婃暩(sh霉)閲�:943 鍏�(n猫i)宓屽紡濉奟AM - EBR:1956 kbit 杓稿叆/杓稿嚭绔暩(sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:800 MHz 宸ヤ綔闆绘簮闆诲:1.1 V 鏈€澶у伐浣滄韩搴�:+ 70 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-256 |
EP1S30F1020I6N | 鍔熻兘鎻忚堪:FPGA - 鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄e垪 FPGA - Stratix I 3247 LABs 726 IOs RoHS:鍚� 鍒堕€犲晢:Altera Corporation 绯诲垪:Cyclone V E 鏌垫サ鏁�(sh霉)閲�: 閭忚集濉婃暩(sh霉)閲�:943 鍏�(n猫i)宓屽紡濉奟AM - EBR:1956 kbit 杓稿叆/杓稿嚭绔暩(sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:800 MHz 宸ヤ綔闆绘簮闆诲:1.1 V 鏈€澶у伐浣滄韩搴�:+ 70 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-256 |
EP1S30F1508C5ES | 鍒堕€犲晢:ALTERA 鍒堕€犲晢鍏ㄧū(ch膿ng):Altera Corporation 鍔熻兘鎻忚堪:Stratix Device Family Data Sheet |
EP1S30F1508C6ES | 鍒堕€犲晢:ALTERA 鍒堕€犲晢鍏ㄧū(ch膿ng):Altera Corporation 鍔熻兘鎻忚堪:Stratix Device Family Data Sheet |
EP1S30F1508C7ES | 鍒堕€犲晢:ALTERA 鍒堕€犲晢鍏ㄧū(ch膿ng):Altera Corporation 鍔熻兘鎻忚堪:Stratix Device Family Data Sheet |