參數資料
型號： EP1K50FI484-2F
英文描述： Field Programmable Gate Array (FPGA)
中文描述： 現場可編程門陣列（FPGA）
文件頁數： 23/86頁
文件大?。?/td> 1263K
代理商： EP1K50FI484-2F
Altera Corporation
3
ACEX 1K Programmable Logic Device Family Data Sheet
Development
13
Tools
I
Software design support and automatic place-and-route provided by
Altera development systems for Windows-based PCs and Sun
SPARCstation, and HP 9000 Series 700/800 workstations
I
Flexible package options are available in 100 to 484 pins, including
the innovative FineLine BGATM packages (see Tables 2 and 3)
I
Additional design entry and simulation support provided by EDIF
2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),
DesignWare components, Verilog HDL, VHDL, and other interfaces
to popular EDA tools from manufacturers such as Cadence,
Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity,
VeriBest, and Viewlogic
Notes:
(1)
ACEX 1K device package types include thin quad flat pack (TQFP), plastic quad flat pack (PQFP), and FineLine
BGA packages.
(2)
Devices in the same package are pin-compatible, although some devices have more I/O pins than others. When
planning device migration, use the I/O pins that are common to all devices.
(3)
This option is supported with a 256-pin FineLine BGA package. By using SameFrameTM pin migration, all FineLine
BGA packages are pin-compatible. For example, a board can be designed to support 256-pin and 484-pin FineLine
BGA packages.
Table 2. ACEX 1K Package Options & I/O Pin Count
Device
100-Pin TQFP
144-Pin TQFP
208-Pin PQFP
256-Pin
FineLine BGA
484-Pin
FineLine BGA
EP1K10
66
92
120
136
136 (3)
EP1K30
102
147
171
171 (3)
EP1K50
102
147
186
249
EP1K100
147
186
333
Table 3. ACEX 1K Package Sizes
Device
100-Pin TQFP
144-Pin TQFP
208-Pin PQFP
256-Pin
FineLine BGA
484-Pin
FineLine BGA
Pitch (mm)
0.50
1.0
Area (mm2)
256
484
936
289
529
Length
× width
(mm
× mm)
16
× 16
22
× 22
30.6
× 30.6
17
× 17
23
× 23
相關PDF資料
PDF描述
EP1K50FI484-2P Field Programmable Gate Array (FPGA)
EP1K50FI484-2X Field Programmable Gate Array (FPGA)
EP1K50FI484-3F Field Programmable Gate Array (FPGA)
EP1K50QC208-1DX Field Programmable Gate Array (FPGA)
EP1K50QC208-1F Field Programmable Gate Array (FPGA)
相關代理商/技術參數
參數描述
EP1K50FI484-2P 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50FI484-2X 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50FI484-3F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50QC2081 制造商:ALTERA 功能描述:*
EP1K50QC208-1 功能描述:FPGA - 現場可編程門陣列 FPGA - ACEX 1K 360 LABs 147 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
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