參數(shù)資料
型號(hào): EP1K50FC256-2F
英文描述: Field Programmable Gate Array (FPGA)
中文描述: 現(xiàn)場(chǎng)可編程門陣列(FPGA)
文件頁(yè)數(shù): 44/86頁(yè)
文件大小: 1263K
代理商: EP1K50FC256-2F
Altera Corporation
49
ACEX 1K Programmable Logic Device Family Data Sheet
Development
13
Tools
Figure 22 shows the required relationship between VCCIO and VCCINT to
satisfy 3.3-V PCI compliance.
Figure 22. Relationship between VCCIO & VCCINT for 3.3-V PCI Compliance
Figure 23 shows the typical output drive characteristics of ACEX 1K
devices with 3.3-V and 2.5-V VCCIO. The output driver is compliant to the
3.3-V PCI Local Bus Specification, Revision 2.2 (when VCCIO pins are
connected to 3.3 V). ACEX 1K devices with a -1 speed grade also comply
with the drive strength requirements of the PCI Local Bus Specification,
Revision 2.2
(when VCCINT pins are powered with a minimum supply of
2.375 V, and VCCIO pins are connected to 3.3 V). Therefore, these devices
can be used in open 5.0-V PCI systems.
3.0
3.1
3.3
VCCIO
IO
3.6
2.3
2.5
2.7
VCCINT
II
(V)
(V)
PCI-Compliant Region
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP1K50FC256-2N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - ACEX 1K 360 LABs 186 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K50FC256-2P 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50FC256-2X 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50FC256-3 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - ACEX 1K 360 LABs 186 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K50FC256-3AA 制造商:Altera Corporation 功能描述:Precision Single, Dual And Quad Rail-to-rail Output Single Supply Amplifiers 制造商:Altera 功能描述:Precision Single, Dual And Quad Rail-to-rail Output Single Supply Amplifiers