參數(shù)資料
型號: EP1K10QC208-3
廠商: Altera
文件頁數(shù): 46/86頁
文件大小: 0K
描述: IC ACEX 1K FPGA 10K 208-PQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標準包裝: 144
系列: ACEX-1K®
LAB/CLB數(shù): 72
邏輯元件/單元數(shù): 576
RAM 位總計: 12288
輸入/輸出數(shù): 120
門數(shù): 56000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
其它名稱: 544-1090
50
Altera Corporation
ACEX 1K Programmable Logic Device Family Data Sheet
Figure 23. Output Drive Characteristics of ACEX 1K Devices
Timing Model
The continuous, high-performance FastTrack Interconnect routing
resources ensure accurate simulation and timing analysis as well as
predictable performance. This predictable performance contrasts with
that of FPGAs, which use a segmented connection scheme and, therefore,
have an unpredictable performance.
Device performance can be estimated by following the signal path from a
source, through the interconnect, to the destination. For example, the
registered performance between two LEs on the same row can be
calculated by adding the following parameters:
LE register clock-to-output delay (tCO)
Interconnect delay (tSAMEROW)
LE look-up table delay (tLUT)
LE register setup time (tSU)
The routing delay depends on the placement of the source and destination
LEs. A more complex registered path may involve multiple combinatorial
LEs between the source and destination LEs.
Timing simulation and delay prediction are available with the simulator
and Timing Analyzer, or with industry-standard EDA tools. The
Simulator offers both pre-synthesis functional simulation to evaluate logic
design accuracy and post-synthesis timing simulation with 0.1-ns
resolution. The Timing Analyzer provides point-to-point timing delay
information, setup and hold time analysis, and device-wide performance
analysis.
VO Output Voltage (V)
IOL
IOH
V
VCCINT = 2.5
VCCIO = 2.5
Room Temperature
V
VCCINT = 2.5
VCCIO = 3.3
Room Temperature
12
3
10
20
30
50
60
40
70
80
90
VO Output Voltage (V)
12
3
10
20
30
50
60
40
70
80
90
IOL
O
Typical I
Output
Current (mA)
O
Typical I
Output
Current (mA)
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