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參數(shù)資料
| 型號(hào)： | EP1AGX60EF1152I6N |
| 廠商： | Altera |
| 文件頁數(shù)： | 1/4頁 |
| 文件大小： | 0K |
| 描述： | IC ARRIA GX FPGA 60K 1152FBGA |
| 產(chǎn)品培訓(xùn)模塊： | Three Reasons to Use FPGA's in Industrial Designs |
| 標(biāo)準(zhǔn)包裝： | 12 |
| 系列： | Arria GX |
| LAB/CLB數(shù)： | 3005 |
| 邏輯元件/單元數(shù)： | 60100 |
| RAM 位總計(jì)： | 2528640 |
| 輸入/輸出數(shù)： | 514 |
| 電源電壓： | 1.15 V ~ 1.25 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 100°C |
| 封裝/外殼： | 1152-BBGA |
| 供應(yīng)商設(shè)備封裝： | 1152-FBGA（27x27） |
| 配用： | 544-2372-ND - KIT DEV ARRIA GX 1AGX60N |
| 其它名稱： | 544-2386 |
December 2009
Altera Corporation
Arria GX Device Handbook, Volume 1
1. Arria GX Device Family Overview
Introduction
The Arria GX family of devices combines 3.125 Gbps serial transceivers with reliable
packaging technology and a proven logic array. Arria GX devices include 4 to 12
high-speed transceiver channels, each incorporating clock data recovery (CDR)
technology and embedded SERDES circuitry designed to support PCI-Express,
Gigabit Ethernet, SDI, SerialLite II, XAUI, and Serial RapidIO protocols, along with
the ability to develop proprietary, serial-based IP using its Basic mode. The
transceivers build upon the success of the Stratix II GX family. The Arria GX FPGA
technology offers a 1.2-V logic array with the right level of performance and
dependability needed to support these mainstream protocols.
Features
The key features of Arria GX devices include:
■
Transceiver block features
■
High-speed serial transceiver channels with CDR support up to 3.125 Gbps.
■
Devices available with 4, 8, or 12 high-speed full-duplex serial transceiver
channels
■
Support for the following CDR-based bus standards—PCI Express, Gigabit
Ethernet, SDI, SerialLite II, XAUI, and Serial RapidIO, along with the ability to
develop proprietary, serial-based IP using its Basic mode
■
Individual transmitter and receiver channel power-down capability for
reduced power consumption during non-operation
■
1.2- and 1.5-V pseudo current mode logic (PCML) support on transmitter
output buffers
■
Receiver indicator for loss of signal (available only in PCI Express [PIPE]
mode)
■
Hot socketing feature for hot plug-in or hot swap and power sequencing
support without the use of external devices
■
Dedicated circuitry that is compliant with PIPE, XAUI, Gigabit Ethernet, Serial
Digital Interface (SDI), and Serial RapidIO
■
8B/10B encoder/decoder performs 8-bit to 10-bit encoding and 10-bit to 8-bit
decoding
■
Phase compensation FIFO buffer performs clock domain translation between
the transceiver block and the logic array
■
Channel aligner compliant with XAUI
AGX51001-2.0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EP1AGX60EF484C6N | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Section I. Arria GX Device Data Sheet |
| EP1AGX60EF484I6N | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:The ArriaTM GX family of devices combines 3.125 gigabits per second (Gbps) serial transceivers |
| EP1AGX60EF780C6N | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Section I. Arria GX Device Data Sheet |
| EP1AGX60EF780I6N | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:The ArriaTM GX family of devices combines 3.125 gigabits per second (Gbps) serial transceivers |
| EP1AGX90 | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Package Information Datasheet for Mature Altera Devices |
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