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參數(shù)資料
| 型號： | EP120656 |
| 英文描述： | Dual LDO with Low Noise, Low IQ, and High PSRR; Temperature Range: -40°C to 85°C; Package: 10-DFN |
| 中文描述： | 延遲線 |
| 文件頁數(shù)： | 1/1頁 |
| 文件大?。?/td> | 12K |
| 代理商： | EP120656 |
7 Pin Single-in-Line Package Passive Delay Lines
50
5
1
2
0.3
EP120650
50
10
2
3
0.5
EP120651
50
20
4
6
0.8
EP120652
50
30
6
9
1.2
EP120653
50
40
8
12
1.8
EP120654
50
10
15
2.3
EP120655
50
60
12
18
2.5
EP120656
50
70
14
22
3.5
EP120657
50
80
16
24
4.2
EP120658
50
90
18
27
4.5
EP120659
50
100
20
28
5.2
EP120660
Zo
DELAY
TAP
RISE
DCR
PCA
OHMS
nS ±5%
DELAYS
TIME
OHMS
PART
±10%
or
±5% or
nS
Max.
NUMBER
±2 nS
Max.
Zo
DELAY
TAP
RISE
DCR
PCA
OHMS
nS ±5%
DELAYS
TIME
OHMS
PART
±10%
or
±5% or
nS
Max.
NUMBER
±2 nS
±2 nS
Max.
100
5
1
2
0.5
EP120661
100
10
2
3. 3
1.0
EP120662
100
20
4
6
1.5
EP120663
100
30
6
9
2.5
EP120664
100
40
8
11
4.0
EP120665
100
50
10
14
5.0
EP120666
100
60
12
17
5.5
EP120667
100
70
14
21
6.0
EP120668
100
80
16
23
6.5
EP120669
100
90
18
25
7.0
EP120670
100
20
28
7.5
EP120671
Package Dimensions
Schematic
DC Electrical Characteristics
Min
Max
Unit
Distortion
±10
%
Temperature Coefficient of Delay
100
PPM/°C
Insulation Resistance @ 100 Vdc
1K
Meg Ohms
Dielectric Strength
100
Vdc
Input Pulse Test Conditions @ 25°C
VIN
Pulse Input Voltage
3 Volts
PW
Pulse Width % of Total Delay
300 %
TRI
Input Rise Time (10 - 90%)
2.0 nS
PRR
Pulse Repetition Rate @ Td
≤ 150 nS
1.0 MHz
Pulse Repetition Rate @ Td > 150 nS
300 KHz
Recommended Operating
Conditions
Min
Max
Unit
PW*
Pulse Width % of Total Delay
200
%
D*
Duty Cycle
40
%
TA
Operating Free Air Temperature
0
70
°C
*These two values are inter-dependent.
DSD1206XX Rev. B 2/5/96
QAF-CSO1 Rev. B 8/25/94
Unless Otherwise Noted Dimensions in Inches
Tolerances:
Fractional = ± 1/32
.XX = ± .030
.XXX = ± .010
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
TEL: (818) 892-0761
FAX: (818) 894-5791
E L E C T R O N I C S
I N C .
Whichever is greater.
4
5
6
7
3
2
1
OUT
GROUND
IN
.800 Max.
.130 Min.
.022
Min.
.250 Max.
.010
Typ.
.195
Max
PCA
EP120650
Date Code
C
L
.022
Typ.
.100 Typ.
相關PDF資料 |
PDF描述 |
|---|---|
| EP120657 | Dual LDO with Low Noise, Low IQ, and High PSRR; Temperature Range: -40°C to 85°C; Package: 10-DFN |
| EP120658 | Dual LDO with Low Noise, Low IQ, and High PSRR; Temperature Range: -40°C to 85°C; Package: 10-DFN |
| EP120659 | Dual LDO with Low Noise, Low IQ, and High PSRR; Temperature Range: -40°C to 85°C; Package: 10-DFN |
| EP120660 | Dual LDO with Low Noise, Low IQ, and High PSRR; Temperature Range: -40°C to 85°C; Package: 10-DFN |
| EP120661 | Dual LDO with Low Noise, Low IQ, and High PSRR; Temperature Range: -40°C to 85°C; Package: 10-DFN |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EP120657 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Delay Line |
| EP120658 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Delay Line |
| EP120659 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Delay Line |
| EP120660 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Delay Line |
| EP120661 | 制造商:PCA 制造商全稱:PCA ELECTRONICS INC. 功能描述:7 Pin Single-in-Line Package Passive Delay Lines |
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