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參數(shù)資料
| 型號： | ENH150X1-300 |
| 英文描述： | High Current LDO with Low IQ and High PSRR; Temperature Range: -40°C to 85°C; Package: 8-MSOP |
| 中文描述： | 15.0inch的XGA |
| 文件頁數(shù)： | 12/15頁 |
| 文件大?。?/td> | 196K |
| 代理商： | ENH150X1-300 |
Original specifications created by Sharp.
6
Panelview Hillsboro, OR (503) 690-2460
Panelview is a subsidiary of White Electronic Designs Corporation
ENH150X1-200/300
Panelview
Enhancing the Vision
TIMING CHARACTERISTICS OF INPUT SIGNALS
H-V mode (MODE = "Low")
Timing diagrams of input signal are shown in Fig. 2.
TIMING CHARACTERISTICS
Parameter
Symbol
Min.
Typ.
Max.
Unit
Clock A
Frequency
1/Tc
25
32.5
40
MHz
Clock B
High time
TCH
9
ns
Low time
TCL
9
ns
Duty ratio
TCH/TCL
0.67
1.00
1.50
Data
Setup time
TDS
8
ns
Hold time
TDH
8
ns
Horizontal
Cycle
TH
16.6
20.7
s
sync. signal
528
672
860
clock
Pulse width
THP
2
68
clock
Horizontal display start
THBP
148
clock
Hsync-Clock phase difference
TFC
5
ns
Vertical sync. signal
Cycle
TV
16.7
ms (1)
773
806
990
line
Pulse width
TVP
1
6
line
Vertical data start
TVBP
35
line
Hsync-Vsync phase difference
TVH
1
TH-THP
clock
Note 1): In case of lower frequency; the deterioration of display quality, flicker, etc. may occur.
HORIZONTAL DISPLAY POSITION
The horizontal display position is determined by ENAB signal and the input data corresponding to the rising edge
of ENAB signal is displayed at the left end of the active area.
Parameter
Symbol
Min.
Typ.
Max.
Unit
Enable signal
Setup time
TES
8
TC-10
ns
Pulse width
TEP
10
512
clock
Hsync-ENAB phase difference
THE
THP + 1
148
TH-512
clock
Do not keep ENAB "Low" during operation.
Vertical Display Position
The vertical display start position is the 35th line from the falling edge of Vsync. (Fig. 2).
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