參數(shù)資料
型號(hào)： EN29F040-90J
廠(chǎng)商： Electronic Theatre Controls, Inc.
英文描述： 4 Megabit (512K x 8-bit) Flash Memory
中文描述： 4兆位（為512k × 8位）閃存
文件頁(yè)數(shù)： 8/32頁(yè)
文件大小： 223K
代理商： EN29F040-90J
4800 Great America Parkway, Suite 202
Santa Clara, CA 95054
Tel: 408-235-8680
Fax: 408-235-8685
8
EN29F040
Rev. D, Issue Date: 2001/07/05
Table 5. EN29F040 Command Definitions
1
st
Write Cycle
Addr
RA
XXXh F0h
555h AAh
2
nd
Write Cycle
3
rd
Write Cycle
4
th
Write Cycle
5
th
Write Cycle
6
th
Write Cycle
Command
Sequence
Read/Reset
Write
Cycles
Req’d
Data
RD
Addr
Data
Addr
Data
Addr
Data Addr Data
Addr Data
Read
Reset
Read/Reset
AutoSelect
Manufacturer ID
1
1
4
2AAh
55h
555h
F0h
RA
000h/
100h
001h/
101h
BA &
02h
PA
555h
555h
RD
7Fh/
1Ch
7Fh/
04h
00h/
01h
PD
AAh 2AAh 55h 555h 10h
AAh 2AAh 55h
4
555h AAh
2AAh
55h
555h
90h
AutoSelect Device ID
4
555h AAh
2AAh
55h
555h
90h
AutoSelect Sector
Protect Verify
Byte Program
Chip Erase
Sector Erase
Sector Erase Suspend
Sector Erase Resume
4
555h AAh
2AAh
55h
555h
90h
4
6
6
1
1
555h AAh
555h AAh
555h AAh
xxxh
xxxh
2AAh
2AAh
2AAh
55h
55h
55h
555h
555h
555h
A0h
80h
80h
BA
30h
B0h
30h
Notes:
RA = Read Address: address of the memory location to be read.
This one is a read cycle.
RD = Read Data: data read from location RA during Read operation.
This one is a read cycle.
PA = Program Address: address of the memory location to be programmed
PD = Program Data: data to be programmed at location PA
BA = Sector Address: address of the Sector to be erased. Address bits A17-A13 uniquely select any Sector.
Byte Programming Command
Programming the EN29F040 is performed on a byte-by-byte basis using a four bus-cycle operation
(two unlock write cycles followed by the Program Setup command and Program Data Write cycle).
When the program command is executed, no additional CPU controls or timings are necessary. An
internal timer terminates the program operation automatically. Address is latched on the falling edge
of
CE
or
W E
, whichever is last; data is latched on the rising edge of
CE
or
W E
, whichever is first.
The program operation is completed when EN29F040 returns the equivalent data to the programmed
location.
Programming status may be checked by sampling data on DQ7 (
DATA
polling) or on DQ6 (toggle
bit). Changing data from 0 to 1 requires an erase operation. When programming time limit is
exceeded, DQ5 will produce a logical “1” and a Reset command can return the device to Read mode.
Chip Erase Command
Chip erase is a six-bus-cycle operation. The chip erase command sequence is initiated by writing two
unlock cycles, followed by a set-up command. Two additional unlock write cycles are then followed by the
chip erase command, which in turn invokes the Embedded Erase algorithm. The device does
not
require
the system to preprogram prior to erase. The Embedded Erase algorithm automatically preprograms and
verifies the entire memory for an all zero data pattern prior to electrical erase. The system is not required
to provide any controls or timings during these operations. The Command Definitions table shows the
address and data requirements for the chip erase command sequence.
相關(guān)PDF資料
PDF描述
EN29F040-90JI 4 Megabit (512K x 8-bit) Flash Memory
EN29F040-90P 4 Megabit (512K x 8-bit) Flash Memory
EN29F040-90PI 4 Megabit (512K x 8-bit) Flash Memory
EN29F040-90T 4 Megabit (512K x 8-bit) Flash Memory
EN29F040-90TI 4 Megabit (512K x 8-bit) Flash Memory
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EN29F040-90JI 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:4 Megabit (512K x 8-bit) Flash Memory
EN29F040-90P 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:4 Megabit (512K x 8-bit) Flash Memory
EN29F040-90PI 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:4 Megabit (512K x 8-bit) Flash Memory
EN29F040-90T 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:4 Megabit (512K x 8-bit) Flash Memory
EN29F040-90TI 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:4 Megabit (512K x 8-bit) Flash Memory
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