參數(shù)資料
型號(hào)： EN29F002NB
英文描述： 5V, Half Duplex, 250kbps Slew Rate Limited, ±15kV ESD Protected, 1/8 Unit Load, RS-485/RS-422 Transceiver; Temperature Range: -40°C to 85°C; Package: 8-SOIC
中文描述： 2兆位（262144 × 8）閃光
文件頁(yè)數(shù)： 31/32頁(yè)
文件大?。?/td> 267K
代理商： EN29F002NB
4800 Great America Parkway, Suite 202
Tel: 408-235-8680
Santa Clara, CA 95054
Fax: 408-235-8685
8
EN29F002 / EN29F002N
Rev. C, Issue Date: 2001/07/05
Table 5. EN29F002 Command Definitions
Command
Sequence
Read/Reset
Write
Cycles
Req’d
1
st
Write Cycle
2
nd
Write Cycle
3
rd
Write Cycle
4
th
Write Cycle
5
th
Write Cycle
6
th
Write Cycle
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read/Reset
1
XXXh
F0h
RA
RD
Read/Reset
4
555h
AAh
AAAh
55h
555h
F0h
RA
RD
AutoSelect
Manufacturer ID
4
555h
AAh
AAAh
55h
555h
90h
000h/
100h
7Fh/
1Ch
AutoSelect Device ID
(Top Boot)
4
555h
AAh
AAAh
55h
555h
90h
001h/
101h
7Fh/
92h
AutoSelect Device ID
(Bottom Boot)
4
555h
AAh
AAAh
55h
555h
90h
001h/
101h
7Fh/
97h
AutoSelect Sector
Protect Verify
4
555h
AAh
AAAh
55h
555h
90h
SA &
02h
00h/
01h
Byte Program
4
555h
AAh
AAAh
55h
555h
A0h
PA
PD
Chip Erase
6
555h
AAh
AAAh
55h
555h
80h
555h
AAh
AAAh
55h
555h
10h
Sector Erase
6
555h
AAh
AAAh
555h
80h
555h
AAh
AAAh
55h
SA
30h
Sector Erase Suspend
1
xxxh
B0h
Sector Erase Resume
1
xxxh
30h
Notes:
RA = Read Address: address of the memory location to be read. This one is a read cycle.
RD = Read Data: data read from location RA during Read operation. This one is a read cycle.
PA = Program Address: address of the memory location to be programmed
PD = Program Data: data to be programmed at location PA
SA = Sector Address: address of the sector to be erased. Address bits A17-A13 uniquely select any sector.
Byte Programming Command
Programming the EN29F002 is performed on a byte-by-byte basis using a four bus-cycle operation
(two unlock write cycles followed by the Program Setup command and Program Data Write cycle).
When the program command is executed, no additional CPU controls or timings are necessary. The
program operation is terminated automatically by an internal timer. Address is latched on the falling
edge of CE or WE , whichever is last; data is latched on the rising edge of CE or WE , whichever is
first.
The program operation is completed when EN29F002 returns the equivalent data to the
programmed location.
Programming status may be checked by sampling data on DQ7 (DATA polling) or on DQ6 (toggle
bit).
Changing data from 0 to 1 requires an erase operation.
When programming time limit is
exceeded, DQ5 will produce a logical “1” and a Reset command can return the device to Read mode.
EN29F002 ignores commands written during Byte Programming. If a hardware RESET occurs
during Byte Programming, data at the programmed location may get corrupted. Programming is
allowed in any sequence and across any sector boundary.
Chip Erase Command
An auto Chip Erase algorithm is employed when the Chip Erase command sequence is performed.
Although the Chip Erase command requires six bus cycles: two unlock write cycles, a setup
command, two additional unlock write cycles and the chip erase command, the user does not need to
do anything else after that, except check to see if the operation has completed. The Auto Chip Erase
algorithm automatically programs and verifies the entire memory array for an all “0” pattern prior to
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EN29F002NT 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2 Megabit (262，144 x 8) FLASH
EN29F002T 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2 Megabit (262，144 x 8) FLASH
EN29F002T-45J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2 Megabit (256K x 8-bit) Flash Memory
EN29F002T-45JI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2 Megabit (256K x 8-bit) Flash Memory
EN29F002T-45P 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2 Megabit (256K x 8-bit) Flash Memory
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