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參數(shù)資料
| 型號： | EMS41CKC-FREQ1TR |
| 廠商： | ECLIPTEK CORP |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 1 MHz - 75 MHz, LVCMOS OUTPUT |
| 封裝： | ROHS COMPLAINT, PLASTIC, SMD, 4 PIN |
| 文件頁數(shù)： | 1/2頁 |
| 文件大?。?/td> | 121K |
| 代理商： | EMS41CKC-FREQ1TR |
MANUFACTURER
CATEGORY
SERIES
PACKAGE
VOLTAGE
CLASS
REV
.DATE
ECLIPTEK CORP.
OSCILLATOR
EMS41
PLASTIC
1.8V
OS6R
04/10
EMS41 Series
OSCILLATOR
EMS41
ELECTRICAL SPECIFICATIONS
800-ECLIPTEK www.ecliptek.com for latest revision
Specifications subject to change without notice.
Spread Spectrum MEMS Clock Oscillators
Low EMI LVCMOS Output
+1.8V Supply Voltage
Tri-State, Power Down, and Spread Disable Options
Center Spread and Down Spread Modulation Options
4 Pad Plastic SMD Package
30,000 G Shock Resistance
RoHS Compliant (Pb-Free)
H
0.85
L
2.5
W
2.0
Nominal Frequency
Operating Temperature Range
Storage Temperature Range
Supply Voltage (V
DD)
Maximum Supply Voltage (V
DD)
Input Current
Frequency Tolerance / Stability
Output Voltage Logic High (V
OH)
Output Voltage Logic Low (V
OL)
Rise Time / Fall Time
Duty Cycle
Load Drive Capability
Output Control Function
Tri-State Input Voltage
(V
IH and VIL)
Power Down Input Voltage
(V
IH and VIL)
Spread Spectrum Input Voltage
(V
IH and VIL)
Standby Current
Disable Current
Spread Spectrum
Modulation Frequency
Period Jitter
Aging
Start Up Time
< 25.000MHz (Unloaded; Nominal Vdd)
> 25.000MHz (Unloaded; Nominal Vdd)
Inclusive of All Conditions: Calibration Tolerance at 25°C , Fre-
quency Stability over the Operating Temperature Range, Supply
Voltage Change, Output Load Change, 1st Year Aging at 25°C,
260°C Reflow, Shock, and Vibration
I
OH = -8mA
I
OL = +8mA
20% to 80% of waveform
< 75.000MHz (at 50% of waveform)
> 75.000MHz (at 50% of waveform)
70% of V
DD Minimum or No Connection to Enable Ouput, 30% of VDD
Maximum to Disable at Output Control Function of Tri-State
70% of V
DD Minimum or No Connection to Enable Ouput, 30% of VDD
Maximum to Disable at Output Control Function of Power Down
70% of V
DD Minimum or No Connection to Enable Ouput, 30% of VDD
Maximum to Disable at Output Control Function of Spread Disable
Pad 1=Ground (at Output Control Function of Power Down)
Pad 1=Ground (at Output Control Function of Tri-State)
Center Spread not available with Output Control Function of
Spread Disable
Cycle to Cycle; Spread Spectrum-On; Fo=133.333M, Vdd=1.8Vdc
First Year at 25°C
1MHz to 87MHz, 93MHz to 175MHz
-20°C to +70°C, or -40°C to +85°C
-55°C to +125°C
1.8V
DC ±5%
-0.5Vdc to +1.98Vdc
25mA Maximum
35mA Maximum
±50ppm or ±100ppm Maximum
90% of V
DD Minimum
10% of V
DD Maximum
2nSeconds Maximum
50 ±5(%)
50 ±10(%)
15pF Maximum
Tri-State (High Impedance)
Power Down (Logic Low)
Spread Disabled (Disabled)
Disabled Output: High Impendance
Disabled Output: Logic Low
Spread Spectrum Output: Disabled
50A Maximum
20mA Maximum
±0.25%, ±0.50%, ±1.00%, -0.50%,
-1.00%, or -2.00%
30kHz Min, 32kHz Typ, 35kHz Max
90pSec Maximum
±1ppm Maximum
10mSec Maximum
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