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| 型號： | EM6640TP16B |
| 英文描述： | Advanced Synchronous Rectified Buck MOSFET Drivers with Pre-POR OVP; Temperature Range: 0°C to 70°C; Package: 8-SOIC |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 35/62頁 |
| 文件大小： | 620K |
| 代理商： | EM6640TP16B |
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EM6640
03/02 REV. C/446
Copyright
2002, EM Microelectronic-Marin SA
40
www.emmicroelectronic.com
11. Supply Voltage Level Detector
The EM6640 has a built-in Supply Voltage Level Detector (SVLD), such that the CPU can compare the supply
voltage against a pre-selected value (default is 2.2V or 2.5V, register selectable). The pre-selected values can be
adjusted by metal mask options. During Sleep Mode this function is inhibited.
The CPU activates the supply voltage level
detector by writing VldStart=1 in the register
RegVldCntl. The actual measurement starts on
the next ck[9] rising edge and lasts during the
ck[9] high period (1.7ms at 600kHz). The busy
flag VldBusy stays high from Start set until the
measurement is finished. The worst case time
until the result is available is 1.5 x ck[9]
prescaler clock periods (600kHz -> 5.1ms).
The detection level must be defined in register
RegVldCntl before the Start bit is set.
During the actual measurement the device will
draw an additional 5uA of IVDD current. After the
end of the measure an interrupt request
IRQVLD is generated and the result is available
by inspection of the bit VLDResult. If the result
is read 0, then the power supply voltage was greater than the detection level value. If read 1, the power supply
voltage was lower than the detection level value. During each read while Busy=1 the VLDResult is not defined.
11.1 Supply Voltage Level Detector Register
Table 11.1.1 register RegVldCntl
Bit
Name
Reset
R/W
Description
3
VLDResult
0
R*
VLD result flag
2
VLDStart
0
W
VLD start
2
VLDBusy
0
R
VLD busy flag
10
0
R
0
VLDlevel
0
R/W
VLD level selection
R* ; VLDResult is not guaranteed while VLDBusy=1
Table 11.1.2 Voltage detector value selecting
VLDlevel
typical voltage level
02.5V
12.2V
Figure 27. SVLD Timing Diagram
VBAT =VDD
compare level
ck[9] (293Hz)
CPU
starts
Busy Flag
measure
1
0
Result
Read Result
SVLD >VBAT
SVLD <VBAT
CPU
starts
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