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參數(shù)資料
| 型號： | EM423M3284LBA-75FE |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 512Mb (4M】4Bank】32) Double DATA RATE SDRAM |
| 中文描述： | 的512Mb（4分】4Bank】32）的雙倍數(shù)據(jù)速率SDRAM |
| 文件頁數(shù)： | 14/20頁 |
| 文件大?。?/td> | 343K |
| 代理商： | EM423M3284LBA-75FE |
eorex
EM42AM3284LBA
Jul. 2006
www.eorex.com
14/20
4. Command Truth Table for CKE
CKE
n-1
H
L
L
L
L
L
L
H
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
L
Current State
n
X
H
H
H
H
H
L
X
H
H
H
H
H
L
H
L
L
L
L
L
L
L
L
/CS
/R
/C
/W
Addr.
Action
X
H
L
L
L
L
X
X
H
L
L
L
L
X
X
H
L
L
L
L
L
L
L
X
X
X
H
H
H
L
X
X
X
H
H
H
L
X
X
X
H
H
H
L
L
L
L
X
X
X
H
H
L
X
X
X
X
H
H
L
X
X
X
X
H
H
L
H
L
L
L
X
X
X
H
L
X
X
X
X
X
H
L
X
X
X
X
X
H
L
X
H
H
L
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
RA
X
INVALID
Exist Self-Refresh
Exist Self-Refresh
ILLEGAL
ILLEGAL
ILLEGAL
NOP(Maintain self refresh)
INVALID
Exist Power down
Exist Power down
ILLEGAL
ILLEGAL
ILLEGAL
NOP(Maintain Power down)
Refer to function true table
Enter power down mode
(Note 3)
Enter power down mode
(Note 3)
ILLEGAL
ILLEGAL
Row active/Bank active
Enter self-refresh
(Note 3)
Mode register access
Special mode register access
Refer to current state
Self Refresh
Both bank
precharge
power down
Op-Code
Op-Code
X
All Banks
Idle
X
Any State Other
than Listed above
Remark:
H = High level, L = Low level, X = High or Low level (Don't care)
Notes 1:
After CKE’s low to high transition to exist self refresh mode.And a time of t
RC
(min) has to be
Elapse after CKE’s low to high transition to issue a new command.
Notes 2:
CKE low to high transition is asynchronous as if restarts internal clock.
Notes 3:
Power down and self refresh can be entered only from the idle state of all banks.
H
H
X
X
X
X
X
Refer to command truth table
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相關代理商/技術參數(shù) |
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| EM423M3284LBA-7FE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:512Mb (4M×4Bank×32) Double DATA RATE SDRAM |
| EM423M3284LBA-8FE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:512Mb (4M×4Bank×32) Double DATA RATE SDRAM |
| EM424M1612VTA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16Mb ( 2Banks ) Synchronous DRAM |
| EM424M1612VTB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16Mb ( 2Banks ) Synchronous DRAM |
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