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參數(shù)資料
| 型號： | EM2420 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 2.4 GHz IEEE 802.15.4 / ZigBee RF Transceiver |
| 中文描述： | 2.4 GHz IEEE 802.15.4標準/ ZigBee的射頻收發(fā)器 |
| 文件頁數(shù)： | 31/89頁 |
| 文件大?。?/td> | 1758K |
| 代理商： | EM2420 |
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EM2420
Ember Part Number: 120-0049-000
C
EM2420 Datasheet
Page 31 of 89
EM
2420
μ
C
CSn
SI
SO
SCLK
MOSI
MISO
SCLK
GIO2
FIFO
FIFOP
CCA
SFD
GIO0
Interrupt
GIO1
Timer Capture
Figure 11. Microcontroller interface example
Receive mode
In receive mode, the
SFD
pin goes high
after the start of frame delimiter (SFD)
field has been completely received. If
address recognition is disabled or is
successful, the
SFD
pin goes low again
only after the last byte of the MPDU has
been received. If the received frame fails
address recognition, the
SFD
pin goes low
immediately. This is illustrated in Figure
12.
The
FIFO
pin is high when there are one
or more data bytes in the RXFIFO. The
first byte to be stored in the RXFIFO is the
length field of the received frame, i.e. the
FIFO
pin is set high when the length field
is written to the RXFIFO. The
FIFO
pin
then remains high until the RXFIFO is
empty.
If
completely or partially inside the RXFIFO,
the
FIFO
pin will remain high until the
RXFIFO is empty.
a
previously
received
frame
is
When address recognition is enabled,
data should not be read out of the RXFIFO
before the address is completely received,
since the frame may be automatically
flushed if it fails address recognition. This
may be handled by using the
FIFOP
pin
RXFIFO overflow
The RXFIFO can only contain a maximum
of 128 bytes at a given time. This may be
divided between multiple frames, as long
as the total number of bytes is 128 or less.
If an overflow occurs in the RXFIFO, this
is signaled to the microcontroller by setting
the
FIFO
pin low while the
FIFOP
pin is
high. Data already in the RXFIFO will not
be affected by the overflow, i.e. frames
already received may be read out.
A
SFLUSHRX
command strobe is required
after a RXFIFO overflow to enable
reception of new data. Note that at least
one byte should be read from the RXFIFO
prior to issuing the
SFLUSHRX
command
strobe. Otherwise the FIFO will be flushed,
but the
FIFOP
pin will not go low before a
byte is read.
For security enabled frames, the MAC
layer must read the source address of the
received frame before it can decide which
key to use to decrypt or authenticate. This
data must therefore not be overwritten
even if it has been read out of the RXFIFO
by
the
microcontroller.
SECCTRL0.RXFIFO_PROTECTION
control
bit is set, the
EM2420
also protects the
frame header of security enabled frames
until decryption has been performed. If no
MAC security is used or if it is
implemented outside the
EM2420
, this bit
may be cleared to achieve optimal use of
the RXFIFO.
If
the
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| EM2420-RTB | 功能描述:IC RF TXRX ZIGBEE 2.4GHZ 48-QLP RoHS:是 類別:RF/IF 和 RFID >> RF 收發(fā)器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:30 系列:- 頻率:4.9GHz ~ 5.9GHz 數(shù)據(jù)傳輸率 - 最大:54Mbps 調(diào)制或協(xié)議:* 應用:* 功率 - 輸出:-3dBm 靈敏度:- 電源電壓:2.7 V ~ 3.6 V 電流 - 接收:* 電流 - 傳輸:* 數(shù)據(jù)接口:PCB，表面貼裝 存儲容量:- 天線連接器:PCB，表面貼裝 工作溫度:-25°C ~ 85°C 封裝/外殼:68-TQFN 裸露焊盤 包裝:管件 |
| EM2420-RTR | 功能描述:IC RF TXRX ZIGBEE 2.4GHZ 48-QLP RoHS:是 類別:RF/IF 和 RFID >> RF 收發(fā)器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:30 系列:- 頻率:4.9GHz ~ 5.9GHz 數(shù)據(jù)傳輸率 - 最大:54Mbps 調(diào)制或協(xié)議:* 應用:* 功率 - 輸出:-3dBm 靈敏度:- 電源電壓:2.7 V ~ 3.6 V 電流 - 接收:* 電流 - 傳輸:* 數(shù)據(jù)接口:PCB，表面貼裝 存儲容量:- 天線連接器:PCB，表面貼裝 工作溫度:-25°C ~ 85°C 封裝/外殼:68-TQFN 裸露焊盤 包裝:管件 |
| EM2420-STB | 功能描述:IC RF TXRX ZIGBEE 2.4GHZ 48-QLP RoHS:否 類別:RF/IF 和 RFID >> RF 收發(fā)器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:30 系列:- 頻率:4.9GHz ~ 5.9GHz 數(shù)據(jù)傳輸率 - 最大:54Mbps 調(diào)制或協(xié)議:* 應用:* 功率 - 輸出:-3dBm 靈敏度:- 電源電壓:2.7 V ~ 3.6 V 電流 - 接收:* 電流 - 傳輸:* 數(shù)據(jù)接口:PCB，表面貼裝 存儲容量:- 天線連接器:PCB，表面貼裝 工作溫度:-25°C ~ 85°C 封裝/外殼:68-TQFN 裸露焊盤 包裝:管件 |
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