參數(shù)資料
型號(hào): ELANSC410
英文描述: Single Synchronous Buck Pulse-Width Modulation (PWM) Controller; Temperature Range: 0&degC to 70°C; Package: 16-QFN
中文描述: ElanSC410 - ElanSC410框圖
文件頁(yè)數(shù): 47/119頁(yè)
文件大?。?/td> 1167K
代理商: ELANSC410
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)當(dāng)前第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)
lanSC310 Microcontroller Data Sheet
33
PREL IMINARY
compatibility. In PC-compatible systems, this signal
can be driven by an 8042 keyboard controller, port 2,
bit 1.
For detailed information about the A20GATE signal,
see the
lanTMSC300 and lanSC310 Microcontrollers
GATEA20 Function Clarification Application Note,
order #21811.
RC
Reset CPU (Input; Active Low)
This signal resets the internal CPU. In PC-compatible
systems, this signal can be driven by a keyboard con-
troller, port 2, bit 0.
SYSCLK [XTCLK]
System Clock (Output)
This clock can be used to provide a clock to a keyboard
controller. It is not synchronous to ISA bus cycles.
XTCLK is the PC/XT keyboard clock. For information
about internal clock states, see Table 22 on page 45.
For information about the maximum ISA bus option,
PARALLEL PORT INTERFACE
ACK
Printer Acknowledge (Input; Active Low)
The printer asserts ACK to confirm that the transfer
from the lanSC310 microcontroller to the parallel port
was successful.
AFDT [X14OUT]
Auto Line Feed Detect (Output; Active Low)
This pin signals the printer to autofeed continuous form
paper. It can be programmed to become a 14.336-MHz
output.
BUSY
Printer Busy (Input; Active High)
The printer asserts BUSY when it is performing an
operation.
ERROR
(Input; Active Low)
The printer asserts the ERROR signal to inform the
parallel port of a deselect condition, PE, or other error
condition.
INIT
Initialize Printer (Output; Active Low)
This pin signals the printer to begin an initialization rou-
tine.
PE
Paper End (Input; Active High)
The printer asserts this signal when it is out of paper.
PPDWE [PPDCS]
Parallel Port Write Enable (Output; Active Low)
The PPDWE signal is used to control the 374 type latch
in a unidirectional parallel port design. To support a bi-
directional parallel port design, this pin can be reconfig-
ured (PPDCS) to act as an address decode for the
parallel port data port. It can then be externally gated
with IOR and IOW to provide the Parallel Port Data
Read and Write Strobes, respectively.
For more information, see “Parallel Port” on page 51.
PPOEN
Parallel Port Output Buffer Enable
(Output; Active Low)
This signal supports a bidirectional parallel port design.
It is used to control the output enable of the Parallel
Port Output Buffer.
SLCT
Printer Select Return (Input; Active High)
The printer asserts SLCT when it has been selected.
SLCTIN
Printer Selected (Output; Active Low)
Asserting SLCTIN selects the line printer.
STRB
Strobe (Output; Active Low)
Asserting STRB signals the line printer to latch data
currently on the parallel port.
SERIAL PORT INTERFACE
CTS
Clear To Send (Input; Active Low)
This signal indicates that the external serial device is
ready to accept data.
DCD
Data Carrier Detect (Input; Active Low)
This signal indicates to the internal serial port controller
that the attached serial device has detected a data car-
rier.
DSR
Data Set Ready (Input; Active Low)
This signal is used to indicate that the external serial
device is ready to establish a communication link with
the internal serial port controller.
相關(guān)PDF資料
PDF描述
ELH0032G Fast Operational Amplifier
ELH0033G Fast Buffer Amplifier
ELH0101CK Dual Regulator-Standard Buck PWM and Linear Power Controller; Temperature Range: 0&degC to 70°C; Package: 8-SOIC T&R
ELH0101ACK Single Synchronous Buck Pulse-Width Modulation (PWM) Controller; Temperature Range: -40°C to 85°C; Package: 16-QFN
ELH0101 Power Operational Amplifier
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ELANSC410-100AC 制造商:Advanced Micro Devices 功能描述:MCU 16-Bit/32-Bit Elan CISC ROMLess 3.3V 292-Pin BGA
ELANSC410-100ACAD 制造商:Advanced Micro Devices 功能描述:
ELANSC410-100AI 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers
ELANSC410-33AC 制造商:Advanced Micro Devices 功能描述:MCU 16-Bit/32-Bit Elan CISC 3.3V 292-Pin BGA
ELANSC410-33AI 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers