參數(shù)資料
型號: EL7562C
英文描述: Monolithic 2 Amp DC:DC Step-down Regulator
中文描述: 單片2安培直流:DC降壓穩(wěn)壓器
文件頁數(shù): 10/10頁
文件大?。?/td> 241K
代理商: EL7562C
9
EL7562C - Preliminary
Monolithic 2 Amp DC:DC Step-down Regulator
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Start-up Delay
A capacitor can be added to the EN pin to delay the con-
verter start-up (Figure 2) by utilizing the pull-up current.
The delay time is approximately:
Layout Considerations
The layout is very important for the converter to func-
tion properly. Power Ground ( ) and Signal Ground (---)
should be separated to ensure that the high pulse current
in the Power Ground never interferes with the sensitive
signals connected to Signal Ground. They should only
be connected at one point (normally at the negative side
of either the input or output capacitor.)
The trace connected to pin 14 (FB) is the most sensitive
trace. It needs to be as short as possible and in a “quiet”
place, preferably between PGND or SGND traces.
In addition, the bypass capacitor connected to the VDD
pin needs to be as close to the pin as possible.
The heat of the chip is mainly dissipated through the
PGND pins. Maximizing the copper area around these
pins is preferable. In addition, a solid ground plane is
always helpful for the EMI performance.
The demo board is a good example of layout based on
these principles. Please refer to the EL7562C Applica-
tion Brief for the layout.
td ms
()
1200 C
F
()
×
=
Figure 2. Start-up Delay
TIME
VO
VIN
td
VOUT
C
2
3
11
10
9
6
7
8
15
14
EL7562C
1
16
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