參數(shù)資料
型號(hào): EL5420TISZ-T7
廠商: Intersil
文件頁(yè)數(shù): 9/17頁(yè)
文件大?。?/td> 0K
描述: IC OPAMP GP RR 12MHZ QD 14SOIC
標(biāo)準(zhǔn)包裝: 1,000
放大器類(lèi)型: 電壓反饋
電路數(shù): 4
輸出類(lèi)型: 滿擺幅
轉(zhuǎn)換速率: 12 V/µs
增益帶寬積: 8MHz
-3db帶寬: 12MHz
電流 - 輸入偏壓: 2nA
電壓 - 輸入偏移: 4000µV
電流 - 電源: 500µA
電流 - 輸出 / 通道: 70mA
電壓 - 電源,單路/雙路(±): 4.5 V ~ 19 V,±2.25 V ~ 9.5 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 帶卷 (TR)
17
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6838.0
September 25, 2009
EL5420T
Thin Shrink Small Outline Package Family (TSSOP)
N
(N/2)+1
(N/2)
TOP VIEW
A
D
0.20 C
2X
B A
N/2 LEAD TIPS
B
E1
E
0.25
CAB
M
1
H
PIN #1 I.D.
0.05
e
C
0.10 C
N LEADS
SIDE VIEW
0.10
CAB
M
b
c
SEE DETAIL ú
END VIEW
DETAIL X
A2
0× - 8
GAUGE
PLANE
0.25
L
A1
A
L1
SEATING
PLANE
MDP0044
THIN SHRINK SMALL OUTLINE PACKAGE FAMILY
SYMBOL
MILLIMETERS
TOLERANCE
14 LD 16 LD 20 LD 24 LD 28 LD
A
1.20
Max
A1
0.10
±0.05
A2
0.90
±0.05
b
0.25
+0.05/-0.06
c
0.15
+0.05/-0.06
D
5.00
6.50
7.80
9.70
±0.10
E
6.40
Basic
E1
4.40
±0.10
e
0.65
Basic
L
0.60
±0.15
L1
1.00
Reference
Rev. F 2/07
NOTES:
1. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusions or gate burrs shall not exceed
0.15mm per side.
2. Dimension “E1” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm per
side.
3. Dimensions “D” and “E1” are measured at dAtum Plane H.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
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