參數(shù)資料
型號: EL5283CY-T13
元件分類: 比較器
英文描述: Dual and Window 8ns High-Speed Comparators
中文描述: 雙和窗口為8ns高速比較器
文件頁數(shù): 7/9頁
文件大?。?/td> 257K
代理商: EL5283CY-T13
7
EL5283C - Preliminary
Dual and Window 8ns High-Speed Comparators
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Applications Information
Power Supplies and Circuit Layout
The EL5283C comparator operates with single and dual
supply with 5V to 12V between VS+ and VS-. The out-
put side of the comparators is supplied by a single
supply from 2.7V to 5V. The rail to rail output swing
enables direct connection of the comparator to both
CMOS and TTL logic circuits. As with many high speed
devices, the supplies must be well bypassed. Elantec rec-
ommends a 4.7F tantalum in parallel with a 0.1F
ceramic. These should be placed as close as possible to
the supply pins. Keep all leads short to reduce stray
capacitance and lead inductance. This will also mini-
mize unwanted parasitic feedback around the
comparator. The device should be soldered directly to
the PC board instead of using a socket. Use a PC board
with a good, unbroken low inductance ground plane.
Good ground plane construction techniques enhance sta-
bility of the comparators.
Input Voltage Considerations
The EL5283C input range is specified from 0.1V below
VS- to 2.25V below VS+. The criterion for the input
limit is that the output still responds correctly to a small
differential input signal. The differential input stage is a
pair of PNP transistors, therefore, the input bias current
flows out of the device. When either input signal falls
below the negative input voltage limit, the parasitic PN
junction formed by the substrate and the base of the PNP
will turn on, resulting in a significant increase of input
bias current. If one of the inputs goes above the positive
input voltage limit, the output will still maintain the cor-
rect logic level as long as the other input stays within the
input range. However, the propagation delay will
increase. When both inputs are outside the input voltage
range, the output becomes unpredictable. Large differ-
ential voltages greater than the supply voltage should be
avoided to prevent damages to the input stage. Inputs of
unused channels should not be left floating. They should
be driven to a known state. For example, one input can
Pin Descriptions
Pin Number
Pin Name
Function
Equivalent Circuit
1
VS+
Positive supply voltage
2
VREFH
Upper voltage reference
Circuit 4
3
IN
Input
(Reference Circuit 4)
4
VREFL
Lower voltage reference
(Reference Circuit 4)
5
VS-
Negative supply voltage
6
GDN
Digital ground
7
OUTL
Low output
(Reference Circuit 2)
8
LATCH
Latch
(Reference Circuit 3)
9
OUTH
High output
(Reference Circuit 2)
10
VSD
Digital supply voltage
IN
VREF
VS+
VS-
相關PDF資料
PDF描述
EL5283C Replaced by PTN04050A :
EL5283CY Replaced by PTN04050A :
EL5287C Replaced by PTN04050A :
EL5287CY Replaced by PTN04050A :
EL5323CL Product Brief 12MHz 4-, 8-, 10- & 12-Channel Rail-to-Rail Input-Output Buffers
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