參數(shù)資料
型號: EL5106ISZ
廠商: Intersil
文件頁數(shù): 13/13頁
文件大?。?/td> 0K
描述: IC AMP FGA SGL 300MHZ 8-SOIC
標準包裝: 97
放大器類型: 通用
電路數(shù): 1
轉(zhuǎn)換速率: 4500 V/µs
-3db帶寬: 380MHz
電流 - 輸入偏壓: 1.5µA
電壓 - 輸入偏移: 1000µV
電流 - 電源: 1.5mA
電流 - 輸出 / 通道: 100mA
電壓 - 電源,單路/雙路(±): 5 V ~ 12 V,±2.5 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SOIC
包裝: 管件
9
FN7357.7
June 6, 2012
Current Limiting
The EL5106 and EL5306 have no internal current-limiting
circuitry. If the output is shorted, it is possible to exceed the
Absolute Maximum Rating for output current or power
dissipation, potentially resulting in the destruction of the
device.
Power Dissipation
With the high output drive capability of the EL5106 and
EL5306, it is possible to exceed the +125°C Absolute
Maximum junction temperature under certain very high load
current conditions. Generally speaking when RL falls below
about 25
Ω, it is important to calculate the maximum junction
temperature (TJMAX) for the application to determine if
power supply voltages, load conditions, or package type
need to be modified for the EL5106 and EL5306 to remain in
the safe operating area. These parameters are calculated as
shown in Equation 1:
where:
TMAX = Maximum ambient temperature
θJA = Thermal resistance of the package
n = Number of amplifiers in the package
PDMAX = Maximum power dissipation of each amplifier in
the package
PDMAX for each amplifier can be calculated as shown in
Equation 2:
where:
VS = Supply voltage
ISMAX = Maximum bias supply current
VOUTMAX = Maximum output voltage (required)
RL = Load resistance
T
JMAX
T
MAX
θ
JA
nPD
MAX
×
()
+
=
(EQ. 1)
PD
MAX
2
(
V
S
I
SMAX )
V
S
(
- V
OUTMAX )
V
OUTMAX
R
L
----------------------------
×
+
×
=
(EQ. 2)
Revision History
DATE
REVISION
CHANGE
April 25, 2012
FN7357.7
Removed obsolete part EL5106IS from “Order Information” page 1.
Corrected Pkg Dwg # in “Order Information” page 1 for EL5306ISZ parts from M8.15E to
MDP0027.
Added MSL note (Note 4 on page 1).
Changed Min/Max limits for “VOS” on page 3 from -10/10mV to -15/15mV. Added “Output
offset voltage including Ib*RF term” to conditions column. Changed Description from “Offset
Voltage” to “Specified Offset Voltage”.
Added package outline drawing MDP0027 to page 13.
June 4, 2009
FN7357.6
Removed obsolete, leaded devices EL5106IW-T7, EL5106IW-T7A; EL5106IS-T7, EL5106IS-
T13; EL5306IS, EL5306IS-T7, EL5306IS-T13; EL5306IU, EL5306IU-T7, EL5306IU-T13
Corrected Figure references in “Gain Setting” on page 7 (Fig 14 callout was referencing Fig
13; Fig 15 callout was referencing Fig 14; Fig 16 callout was referencing Fig 15) .
Updated pin descriptions to match pin names of EL5306.
Applied Intersil Standards: Updated Pb-free bullet in Features, Updated ordering information
by removing tape and reel column and adding standard reference note and updating note to
match lead finish, updated caution statement to legal's suggested verbiage. Changed date
and Rev'd to 6.
Updated Package Outline Drawing MDP0038 toP6.064A - P6.064A replaces 6 Ld SOT-23
(same dimensions, just MDP0038 had both 5 & 6 Ld SOT23s w/dimensions listed in table)
Updated Package Outline Drawing MDP0027 to M8.15E - M8.15E replaces MDP0027 8 Ld
SOIC (same dimensions, just MDP0027 had 8, 14, 16, 20, 24, 28 Ld SOICS with dimensions
listed in table)
P1, added Note 3 "The part marking is located on the bottom of the part" for SOT-23 package
Added Revision History table.
EL5106, EL5306
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