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參數(shù)資料
| 型號： | EL4581CSZ-T7 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 6/10頁 |
| 文件大小： | 0K |
| 描述： | IC VIDEO SYNC SEPARATOR 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 同步分離器 |
| 應(yīng)用： | 顯示器，測試設(shè)備，視頻 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 1247 (CN2011-ZH PDF) |
| 其它名稱： | EL4581CSZ-T7DKR |
5
FN7172.2
November 12, 2010
Timing Diagrams
NOTES:
9. The composite sync output reproduces all the video input sync pulses, with a propagation delay.
10. Vertical sync leading edge is coincident with the first vertical serration pulse leading edge, with a propagation delay.
11. Odd-even output is low for even field, and high for odd field.
12. Back porch goes low for a fixed pulse width on the trailing edge of video input sync pulses. Note that for serration pulses during vertical, the
back porch starts on the rising edge of the serration pulse (with propagation delay).
FIGURE 10.
START OF
FIELD ONE
PRE-EQUALIZING
PULSE INTERVAL
H SYNC
INTERVAL
PULSE INTERVAL
POST-EQUALIZING
REF SUBCARRIER PHASE,
COLOR FIELD ONE
TIME
1.5s±230s
T1
FIELD ONE
+H
-0
1271s+63.5s
-0s
)
(
(*SEE NOTE)
SEE FIG 4
SEE FIG 2, 3
VERTICAL BLANKING INTERVAL = 20H
3H
1
2
3
4
5
6
7
8
9
10
19
20
21
H
VERTICAL SYNC
PULSE INTERVAL
9 LINE VERTICAL
INTERVAL
H
0.5H
H
SIGNAL 1b. COMPOSITE SYNC OUTPUT, PIN 1
SIGNAL 1c. VERTICAL SYNC OUTPUT, PIN 3
SIGNAL 1d. ODD-EVEN OUTPUT, PIN 7
SIGNAL 1e. BACK PORCH OUTPUT, PIN 5
SIGNAL 1a. COMPOSITE VIDEO INPUT, FIELD ONE
EL4581
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