參數(shù)資料
| 型號： | EL4093CSZ-T7 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 12/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VIDEO AMP 300MHZ 16-SOIC |
| 標準包裝： | 1,000 |
| 應用： | 電流反饋 |
| 電路數(shù)： | 1 |
| -3db帶寬： | 300MHz |
| 轉換速率： | 1500 V/µs |
| 電流 - 電源： | 9.5mA |
| 電流 - 輸出 / 通道： | 100mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
9
Autozero Interface
The autozero interface refers to the connection between the
S/H output and the CFA inverting input. This interface has
been greatly simplified compared to that of the EL2090, in
that the S/H output is a high impedance current source. The
S/H output can be connected directly to the inverting input,
and its high impedance greatly reduces the interaction
between the sample & hold and the gain setting resistors.
Another virtue of this interface is better gain linearity as the
autozero current changes. For example, at an autozero
current of 0mA the output impedance is about 5M
Ω,
dropping to 1M
Ω as the autozero current increases to 3mA.
Using RF = RG = 750Ω, the closed loop gain changes only
by 0.025% in this interval.
Autozero Range
The autozero range is defined as the difference between the
input DC level and the reference voltage to restore to. The
size of this range is a function of the gain setting resistors
used and the S/H output current swing. For a gain of +2 the
optimum feedback resistor is 750
Ω, and the available S/H
output current is ±5.5mA minimum. To determine the
autozero range for this case, we refer to Figure 3 below.
Suppose that the input DC level is +VDC, and that the
reference voltage is 0V. We know that in feedback, the
following two conditions will exist on the CFA: first, its output
will be equal to 0V (due to autozero), and second, its VIN-
voltage is equal to the VIN+ voltage (i.e. VIN- = +VDC). So
we have a potential difference of +VDC across both RF and
RG, resulting in a current IRF = IRG = VDC/750Ω that must
flow into each of them. This current IAZ = (IRF + IRG) must
come from the S/H output. Since the maximum that IAZ can
be is 5.5mA, we can solve for VDC using the following:
and see that VDC = ±2V. This range can easily
accommodate most video signals.
As another example, consider the case where we are
restoring to a reference voltage of +0.75V. Using the same
reasoning as above, a current IRF = (VDC - 0.75V)/RF must
flow through RF, and a current IRG = VDC/RG must go into
RG. Again, our boundary condition is that IRF + IRG
≤ ±5.5mA, and we can solve for the allowable VDC values
using the following:
Hence VDC must be between +2.4V to -1.7V. This example
illustrates that when the reference changes, the autozero
range also changes. In general, the user should determine
the autozero range for his/her application, and ensure that
the input signal is within this range during the autozero
period.
Autozero Loop Bandwidth
The gain-bandwidth product (GBWP) of the autozero loop is
determined by the size of the hold capacitor, the value of RF,
and the transconductances (gm’s) of the S/H amplifier. To
begin, the S/H amplifier is modeled as in Figure 4. First, the
input stage transconductance is represented by gm1, with
the compensation capacitor given by CHOLD. This stage’s
GBWP is thus gm1/(2
π CHOLD) = 1/(2π (350Ω)(2.2nF)) =
207kHz. Next, since the S/H has a current output, its output
stage can be modeled as a transconductance gm2, in this
case having a value of 1/(500
Ω). The current from gm2 then
flows through the I to V converter made up of the CFA and
RF to produce a voltage gain. Thus the GBWP of the overall
loop is given by:
GAIN
OPTIMUM RF
BW (MHz)
PEAKING (dB)
+1
910
314
0.2
+2
750
300
0
+5
470
294
0.2
-1
680
300
0
FIGURE 3.
IAZ
5.5mA
2
VDC
750
Ω
---------------
=
±
=
5.5mA
VDC 0.75V
–
750
Ω
----------------------------------
VDC
750
Ω
---------------
+
=
±
GBWP
gm1
2
π C
HOLD
×
--------------------------------- gm2
RF
×
()
=
EL4093
相關PDF資料 |
PDF描述 |
|---|---|
| EL4332CSZ-T13 | MUX/AMP TRIPLE 2:1 300MHZ 16SOIC |
| EL4340IU-T7 | MUX/AMP TRIPLE 500MHZ 24-QSOP |
| EL4501IU-T13 | IC VIDEO FRONT END AMP 24-QSOP |
| EL4511CU-T13 | IC SUPER SYNC SEPARATOR 24-QSOP |
| EL4543IL-T7 | IC DRVR TWISTED TRPL DIFF 20-QFN |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EL4094 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Video Gain Control/Fader |
| EL4094C | 制造商:ELANTEC 制造商全稱:ELANTEC 功能描述:Video Gain Control/Fader |
| EL4094CN | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Video Gain Control/Fader |
| EL4094CS | 制造商:Intersil Corporation 功能描述:SPECIALTY CONSUMER CIRCUIT, PDSO8 |
| EL4095 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Video Gain Control/Fader/Multiplexer |
發(fā)布緊急采購，3分鐘左右您將得到回復。