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| 型號： | EL4093CS |
| 廠商： | Intersil |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VIDEO AMP 300MHZ 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 47 |
| 應(yīng)用： | 電流反饋 |
| 電路數(shù)： | 1 |
| -3db帶寬： | 300MHz |
| 轉(zhuǎn)換速率： | 1500 V/µs |
| 電流 - 電源： | 9.5mA |
| 電流 - 輸出 / 通道： | 100mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 管件 |
8
restoration. Figure 1 shows how the two are connected to
provide this function; the S/H compares the output of the
CFA to a DC reference, and any difference between them
causes an output current from the S/H. This “autozero”
current is fed to the CFA inverting input, the effect of which is
to move the CFA output towards the reference voltage. This
autozero mechanism settles when the CFA output is one
VOS away from the reference (the VOS here refers to the
S/H offset voltage).
The autozero mechanism is typically active for only a short
period of each video line. Figure 2 shows a NTSC video
signal along with the EL4581 back porch output. The back
porch signal is used to drive the HOLD input of the EL4093,
and we see that the EL4093 is in sample mode for only
3.5s of each line. It is during this time that the autozero
mechanism attempts to drive the CFA output towards the
reference voltage, at the same time putting a correction
voltage onto the hold capacitor CHOLD. During the rest of
the line (60s) the EL4093 is in hold mode, but DC
correction is maintained by the voltage on CHOLD.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Ground
plane construction is highly recommended. Lead lengths
should be as short as possible. The power supply pins must
be well bypassed to reduce the risk of oscillation. In the
EL4093 there are two sets of supply pins: V+1/V-1 provide
power for the CFA, and V+2/V-2 are for the S/H amplifier.
Good performance can be achieved using only one set of
bypass capacitors, although they must be close to the
V+1/V-1 pins since that is where the high frequency currents
flow. The combination of a 4.7F tantalum capacitor in
parallel with a 0.01F capacitor has been shown to work
well. Chip capacitors are recommended for the 0.01F
bypass to minimize lead inductance.
For good AC performance, parasitic capacitance should be
kept to a minimum, especially at the CFA inverting input.
Ground plane construction should be used, but it should be
removed from the area near the inverting input to minimize
any stray capacitance at that node. Chip resistors are
recommended for RF and RG, and use of sockets should be
avoided if possible. Sockets add parasitic inductance and
capacitance which will result in some additional peaking and
overshoot.
If the CFA is configured for non-inverting gain, then one
should also pay attention to the trace leading to the +input.
The inductance of a long trace (> 3’) can form a resonant
network with the amplifier input, resulting in high frequency
oscillations around 700MHz. In such cases a 50
Ω–100Ω
series resistor placed close to the +input would isolate this
inductance and damp out the resonance.
Capacitance at the Inverting Input
Any manufacturer’s high-speed voltage or current feedback
amplifier can be affected by stray capacitance at the
inverting input. For inverting gains this parasitic capacitance
has little effect because the inverting input is a virtual
ground, but for non-inverting gains this capacitance (in
conjunction with the feedback and gain resistors) creates a
pole in the feedback path of the amplifier. This pole, if low
enough in frequency, has the same destabilizing effect as a
zero in the forward open-loop response. Hence it is
important to minimize the stray capacitance at this node by
removing the nearby ground plane. In addition, since the S/H
output connects to this node, it is important to minimize the
trace capacitance. Good practice here would be to connect
the two pins with a short trace directly underneath the chip.
Feedback Resistor Values
The EL4093 has been optimized for a gain of +2 with
RF =750Ω. This value of feedback resistor gives a 3dB
bandwidth of 300MHz at a gain of +2 driving a 150
Ω load.
Since the amplifier inside the EL4093 uses current mode
feedback, it is possible to change the value of RF to adjust
the bandwidth. Shown in the table below are optimum
feedback resistor values for different closed loop gains.
FIGURE 1.
FIGURE 2.
EL4093
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| EL4093CS-T13 | 功能描述:IC VIDEO AMP 300MHZ 16-SOIC RoHS:否 類別:集成電路 (IC) >> 線性 - 放大器 - 視頻放大器和頻緩沖器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 應(yīng)用:驅(qū)動器 輸出類型:差分 電路數(shù):3 -3db帶寬:350MHz 轉(zhuǎn)換速率:1000 V/µs 電流 - 電源:14.5mA 電流 - 輸出 / 通道:60mA 電壓 - 電源，單路/雙路(±):5 V ~ 12 V，±2.5 V ~ 6 V 安裝類型:表面貼裝 封裝/外殼:20-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) |
| EL4093CS-T7 | 功能描述:IC VIDEO AMP 300MHZ 16-SOIC RoHS:否 類別:集成電路 (IC) >> 線性 - 放大器 - 視頻放大器和頻緩沖器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 應(yīng)用:驅(qū)動器 輸出類型:差分 電路數(shù):3 -3db帶寬:350MHz 轉(zhuǎn)換速率:1000 V/µs 電流 - 電源:14.5mA 電流 - 輸出 / 通道:60mA 電壓 - 電源，單路/雙路(±):5 V ~ 12 V，±2.5 V ~ 6 V 安裝類型:表面貼裝 封裝/外殼:20-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) |
| EL4093CSZ | 功能描述:IC VIDEO AMP 300MHZ 16-SOIC RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 視頻放大器和頻緩沖器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 應(yīng)用:驅(qū)動器 輸出類型:差分 電路數(shù):3 -3db帶寬:350MHz 轉(zhuǎn)換速率:1000 V/µs 電流 - 電源:14.5mA 電流 - 輸出 / 通道:60mA 電壓 - 電源，單路/雙路(±):5 V ~ 12 V，±2.5 V ~ 6 V 安裝類型:表面貼裝 封裝/外殼:20-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) |
| EL4093CSZ | 制造商:Intersil Corporation 功能描述:Video Buffer / Amplifier IC |
| EL4093CSZ-T13 | 功能描述:IC VIDEO AMP 300MHZ 16-SOIC RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 視頻放大器和頻緩沖器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 應(yīng)用:驅(qū)動器 輸出類型:差分 電路數(shù):3 -3db帶寬:350MHz 轉(zhuǎn)換速率:1000 V/µs 電流 - 電源:14.5mA 電流 - 輸出 / 通道:60mA 電壓 - 電源，單路/雙路(±):5 V ~ 12 V，±2.5 V ~ 6 V 安裝類型:表面貼裝 封裝/外殼:20-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) |
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