參數(shù)資料
型號(hào): EL1519CS-T13
廠商: Intersil
文件頁(yè)數(shù): 7/9頁(yè)
文件大?。?/td> 0K
描述: IC LINE DRIVER CPE ADSL 8-SOIC
標(biāo)準(zhǔn)包裝: 2,500
類型: 驅(qū)動(dòng)器
驅(qū)動(dòng)器/接收器數(shù): 1/0
規(guī)程: DSL
電源電壓: 5 V ~ 12 V
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 帶卷 (TR)
7
FN7017.2
April 10, 2007
Applications Information
Product Description
The EL1519 is a dual operational amplifier designed for
customer premise line driving in DMT ADSL solutions. It is a
dual current mode feedback amplifier with low distortion
while drawing moderately low supply current. It is built using
Elantec's proprietary complimentary bipolar process and is
offered in industry standard pin-outs. Due to the current
feedback architecture, the EL1519 closed-loop 3dB
bandwidth is dependent on the value of the feedback
resistor. First the desired bandwidth is selected by choosing
the feedback resistor, RF, and then the gain is set by picking
the gain resistor, RG. The curves at the beginning of the
Typical Performance Curves section show the effect of
varying both RF and RG. The 3dB bandwidth is somewhat
dependent on the power supply voltage.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Ground
plane construction is highly recommended. Lead lengths
should be as short as possible, below 1/4”. The power
supply pins must be well bypassed to reduce the risk of
oscillation. A 1.0F tantalum capacitor in parallel with a
0.01F ceramic capacitor is adequate for each supply pin.
For good AC performance, parasitic capacitances should be
kept to a minimum, especially at the inverting input. This
implies keeping the ground plane away from this pin. Carbon
resistors are acceptable, while use of wire-wound resistors
should not be used because of their parasitic inductance.
Similarly, capacitors should be low inductance for best
performance.
FIGURE 25. DIFFERENTIAL FREQUENCY RESPONSE vs RF
FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Typical Performance Curves
100K
1M
10M
100M
(Hz)
AV=5
VS=±6V
RL=100Ω
RF=1kΩ
RF=750Ω
RF=500Ω
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
0
0.8
P
O
WER
DISSIP
A
TION
(W)
0.4
0.2
0.6
1.2
AMBIENT TEMPERATURE (°C)
0
1
25
50
75
100
150
125
85
781mW
θ
JA =1
60°C
/W
SO
8
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY (4-LAYER) TEST BOARD
3.5
3
0
AMBIENT TEMPERATURE (°C)
POWE
R
DI
SSI
P
A
TI
ON
(W)
0150
50
100
2
2.5
1
1.5
0.5
125
25
75 85
1.136W
110°C/
W
SO8
EL1519
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