參數(shù)資料
型號(hào): EDS6416AHTA
廠商: Elpida Memory, Inc.
元件分類: 圓形連接器
英文描述: Circular Connector; No. of Contacts:22; Series:MS27472; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:12; Circular Contact Gender:Socket; Circular Shell Style:Wall Mount Receptacle RoHS Compliant: No
中文描述: 6400位的SDRAM(4分字× 16位)
文件頁(yè)數(shù): 4/49頁(yè)
文件大?。?/td> 716K
代理商: EDS6416AHTA
EDS6416AHBH, EDS6416CHBH
Data Sheet E0442E40 (Ver. 4.0)
4
Electrical Specifications
All voltages are referenced to VSS (GND).
After power up, execute power up sequence and initialization sequence before proper device operation is achieved
(refer to the Power up sequence).
Absolute Maximum Ratings
Parameter
Symbol
Rating
Voltage on any pin relative to VSS
[EDS6416AH]
[EDS6416CH]
VT
–0.5 to VDD + 0.5 (
3.6 (max.))
Unit
Note
VT
–0.5 to VDD + 0.5 (
4.6 (max.))
V
V
Supply voltage relative to VSS
[EDS6416AH]
[EDS6416CH]
VDD
–0.5 to +4.6
V
VDD
–0.5 to +3.6
V
Short circuit output current
IOS
50
mA
Power dissipation
PD
1.0
W
Operating ambient temperature
TA
0 to +70
°
C
Storage temperature
Tstg
–55 to +125
°
C
Caution
Exposing the device to stress above those listed in Absolute Maximum Ratings could cause
permanent damage. The device is not meant to be operated under conditions outside the limits
described in the operational section of this specification. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
Recommended DC Operating Conditions (TA = 0
°
C to +70
°
C)
[EDS6416AH]
Parameter
Symbol
min.
max.
Unit
Notes
Supply voltage
VDD, VDDQ
3.0
3.6
V
1
VSS, VSSQ
0
0
V
2
Input high voltage
VIH
2.0
VDD + 0.3
V
3
Input low voltage
VIL
–0.3
0.8
V
4
Notes: 1. The supply voltage with all VDD
and VDDQ pins must be on the same level.
2. The supply voltage with all VSS and VSSQ pins must be on the same level.
3. VIH (max.) = VDD + 1.5V (pulse width
5ns).
4. VIL (min.) = VSS – 1.5V (pulse width
5ns).
[EDS6416CH]
Parameter
Symbol
min.
max.
Unit
Notes
Supply voltage
VDD, VDDQ
2.3
2.7
V
1
VSS, VSSQ
0
0
V
2
Input high voltage
VIH
1.7
VDD + 0.3
V
3
Input low voltage
VIL
–0.3
0.7
V
4
Notes: 1. The supply voltage with all VDD
and VDDQ pins must be on the same level.
2. The supply voltage with all VSS and VSSQ pins must be on the same level.
3. VIH (max.) = VDD + 1.5V (pulse width
5ns).
4. VIL (min.) = VSS – 1.5V (pulse width
5ns).
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