參數(shù)資料
型號: EDS2532JEBH-75
廠商: Elpida Memory, Inc.
英文描述: 256M bits SDRAM (8M words x 32 bits)
中文描述: 256M位的SDRAM(800萬字× 32位)
文件頁數(shù): 36/48頁
文件大小: 578K
代理商: EDS2532JEBH-75
EDS2532CABH
Data Sheet E0395E40 (Ver. 4.0)
36
Bank active command interval
1. Same bank: The interval between the two bank active commands must be no less than tRC.
2. In the case of different bank active commands: The interval between the two bank active commands must be no
less than tRRD.
CLK
Command
Address
BS
Bank 0
Active
ACT
ROW
ACT
ROW
Bank 0
Active
tRC
Bank Active to Bank Active for Same Bank
CLK
Command
Address
BS
Bank 0
Active
Bank 3
Active
ACT
ROW:0
ACT
ROW:1
tRRD
Bank Active to Bank Active for Different Bank
Mode register set to Bank active command interval
The interval between setting the mode register and executing a bank active command must be no less than
l
MRD.
CLK
Command
Address
Mode
Register Set
Bank
Active
MRS
l
MRD
ACT
BS & ROW
OPCODE
Mode register set to Bank active command interval
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