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參數(shù)資料
| 型號(hào)： | EDS2532CABH-1AL-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | GT 5C 3#4 2#16 PIN PLUG |
| 中文描述： | 8M X 32 SYNCHRONOUS DRAM, 6 ns, PBGA90 |
| 封裝： | LEAD FREE, FBGA-90 |
| 文件頁數(shù)： | 25/48頁 |
| 文件大?。?/td> | 578K |
| 代理商： | EDS2532CABH-1AL-E |
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EDS2532CABH
Data Sheet E0395E40 (Ver. 4.0)
25
Auto Precharge
Read with auto-precharge
In this operation, since precharge is automatically performed after completing a read operation, a precharge
command need not be executed after each read operation. The command executed for the same bank after the
execution of this command must be the bank active (ACT) command. In addition, an interval defined by
l
APR is
required before execution of the next command.
[Clock cycle time]
/CAS latency
Precharge start cycle
3
2 cycle before the final data is output
2
1 cycle before the final data is output
CLK
l
APR
l
RAS
l
APR
CL=2 Command
CL=3 Command
DQ
DQ
Note: Internal auto-precharge starts at the timing indicated by " ".
And an interval of tRAS (
l
RAS) is required between previous active (ACT) command and internal precharge " ".
ACT
READA
ACT
out3
out2
out1
out0
l
RAS
ACT
READA
ACT
out3
out2
out1
out0
Burst Read (BL = 4)
Write with auto-precharge
In this operation, since precharge is automatically performed after completing a burst write or single write operation,
a precharge command need not be executed after each write operation. The command executed for the same bank
after the execution of this command must be the bank active (ACT) command. In addition, an interval of
l
DAL is
required between the final valid data input and input of next command.
CLK
Command
DQ
l
DAL
l
RAS
ACT
WRITA
in0
in1
in2
in3
ACT
Note: Internal auto-precharge starts at the timing indicated by " ".
and an interval of tRAS (
l
RAS) is required between previous active (ACT) command
and internal precharge " ".
Burst Write (BL = 4)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EDS2532AABH-75 | 71-580584-09S |
| EDS2532AABH-75-E | GT 3C 3#0 PIN PLUG |
| EDS2532CABH-75-E | GT 3C 3#0 SKT PLUG |
| EDS2532AABH-75L-E | GT 47C 7#12 40#16 SKT PLUG |
| EDS2532CABH-75L-E | 256M bits SDRAM (8M words x 32 bits) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDS2532CABH-75-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM (8M words x 32 bits) |
| EDS2532CABH-75L-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM (8M words x 32 bits) |
| EDS2532CABJ | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM |
| EDS2532CABJ-1A-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM |
| EDS2532CABJ-1AL-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits SDRAM |
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