參數(shù)資料
型號(hào)： EDS2516AFTA-6B-E
廠商： ELPIDA MEMORY INC
元件分類： DRAM
英文描述： 256M bits SDRAM
中文描述： 16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝： ROHS COMPLIANT, PLASTIC, TSOP2-54
文件頁(yè)數(shù)： 5/50頁(yè)
文件大小： 603K
代理商： EDS2516AFTA-6B-E
EDS2516AFTA
Data Sheet E0984E20 (Ver. 2.0)
5
DC Characteristics 1 (TA = 0 to +70
°
C, VDD, VDDQ = 3.3V ± 0.3V, VSS, VSSQ = 0V)
Parameter
Symbol
Grade
max.
Unit
Test condition
Burst length = 1
tRC = tRC (min.)
CKE = VIL,
tCK = tCK (min.)
Notes
Operating current
IDD1
100
mA
1, 2, 3
Standby current in power down
IDD2P
3
mA
6
Standby current in power down
(input signal stable)
IDD2PS
2
mA
CKE = VIL, tCK =
∞
7
Standby current in non power down
IDD2N
20
mA
CKE, /CS = VIH,
tCK = tCK (min.)
CKE = VIH, tCK =
∞
,
/CS = VIH
CKE = VIL,
tCK = tCK (min.)
4
Standby current in non power down
(input signal stable)
IDD2NS
9
mA
8
Active standby current in power down
IDD3P
4
mA
1, 2, 6
Active standby current in power down
(input signal stable)
IDD3PS
3
mA
CKE = VIL, tCK =
∞
2, 7
Active standby current in non power down IDD3N
40
mA
CKE, /CS = VIH,
tCK = tCK (min.)
CKE = VIH, tCK =
∞
,
/CS = VIH
tCK = tCK (min.),
BL = 4
1, 2, 4
Active standby current in non power down
(input signal stable)
IDD3NS
30
mA
2, 8
Burst operating current
IDD4
120
mA
1, 2, 5
Refresh current
IDD5
200
mA
tRC = tRC (min.)
3
Self refresh current
IDD6
2
mA
VIH
≥
VDD – 0.2V
VIL
≤
0.2V
Notes: 1. IDD depends on output load condition when the device is selected. IDD (max.) is specified at the output
open condition.
2. One bank operation.
3. Input signals are changed once per one clock.
4. Input signals are changed once per two clocks.
5. Input signals are changed once per four clocks.
6. After power down mode, CLK operating current.
7. After power down mode, no CLK operating current.
8. Input signals are VIH or VIL fixed.
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