參數(shù)資料
型號: EDS1232AATA-TI
廠商: Elpida Memory, Inc.
英文描述: RAC40-TA(-E)(-ST) Series - Powerline Regulated AC-DC Converters; Output Voltage (Vdc): 5V; Auxilary Voltage (Vdc): 15V; Features: Compact 40W AC-DC Power Supply; Universal Input Voltage Range; 4000VAC Isolation, Low Leakage Current; Low Output Ripple and Noise; Short Circuit Protected; UL-60601 Certified for Medical Applications
中文描述: 128兆位內(nèi)存水樹(寬溫度范圍)
文件頁數(shù): 36/55頁
文件大?。?/td> 564K
代理商: EDS1232AATA-TI
EDS1232CABB, EDS1232CATA
Preliminary Data Sheet E0247E40 (Ver. 4.0)
36
Write command to Read command interval:
1. Same bank, same ROW address: When the read command is executed at the same ROW address of the same
bank as the preceding write command, the read command can be performed after an interval of no less than 1
clock. However, in the case of a burst write, data will continue to be written until one clock before the read
command is executed.
CLK
Command
DQ (input)
WRIT
READ
in A0
out B1
out B2
out B3
out B0
DQ (output)
Column = A
Write
Column = B
Read
Column = B
Dout
/CAS Latency
DQM
Burst Write Mode
CL = 2
BL = 4
Bank 0
WRITE to READ Command Interval (1)
CLK
Command
DQ (input)
WRIT
READ
in A0
out B1
out B2
out B3
out B0
DQ (output)
Column = A
Write
Column = B
Read
Column = B
Dout
/CAS Latency
in A1
DQM
Burst Write Mode
CL = 2
BL = 4
Bank 0
WRITE to READ Command Interval (2)
2. Same bank, different ROW address: When the ROW address changes, consecutive read commands cannot be
executed; it is necessary to separate the two commands with a precharge command and a bank active
command.
3. Different bank: When the bank changes, the read command can be performed after an interval of no less than 1
clock, provided that the other bank is in the bank active state. However, in the case of a burst write, data will
continue to be written until one clock before the read command is executed (as in the case of the same bank and
the same address).
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