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參數(shù)資料
| 型號(hào)： | EDS1232AASE-75L-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類(lèi)： | DRAM |
| 英文描述： | ER 2C 2#8 SKT RECP LINE |
| 中文描述： | 4M X 32 SYNCHRONOUS DRAM, 5.4 ns, PBGA90 |
| 封裝： | ROHS COMPLIANT, FBGA-90 |
| 文件頁(yè)數(shù)： | 21/55頁(yè) |
| 文件大?。?/td> | 564K |
| 代理商： | EDS1232AASE-75L-E |
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EDS1232CABB, EDS1232CATA
Preliminary Data Sheet E0247E40 (Ver. 4.0)
21
Command Truth Table for CKE
CKE
Current State
n – 1 n
/CS /RAS /CAS /WE Address
Operation
Notes
Self refresh
H
×
×
×
×
×
×
×
×
×
×
INVALID, CLK (n – 1) would exit self refresh
L
H
H
Self refresh recovery
L
H
L
H
H
×
×
Self refresh recovery
L
H
L
H
L
×
×
ILLEGAL
L
H
L
L
×
×
×
×
×
×
ILLEGAL
L
L
×
×
Continue self refresh
Self refresh recovery
H
H
H
×
×
×
×
Idle after tRC
H
H
L
H
H
×
×
Idle after tRC
H
H
L
H
L
×
×
ILLEGAL
H
H
L
L
×
×
×
ILLEGAL
H
L
H
×
×
×
×
×
×
ILLEGAL
H
L
L
H
H
ILLEGAL
H
L
L
H
L
×
×
ILLEGAL
H
L
L
L
×
×
×
ILLEGAL
Power down
H
×
×
×
×
×
INVALID, CLK (n – 1) would exit power down
L
H
H
×
×
×
×
EXIT power down
L
H
L
H
H
H
×
×
EXIT power down
L
L
×
×
×
×
Continue power down mode
All banks idle
H
H
H
×
×
×
Refer to operations in Function Truth Table
H
H
L
H
×
×
Refer to operations in Function Truth Table
H
H
L
L
H
×
Refer to operations in Function Truth Table
H
H
L
L
L
H
×
CBR (auto) Refresh
H
H
L
L
L
L
OPCODE Refer to operations in Function Truth Table
H
L
H
×
×
×
Begin power down next cycle
H
L
L
H
×
×
Refer to operations in Function Truth Table
H
L
L
L
H
×
Refer to operations in Function Truth Table
H
L
L
L
L
H
×
Self refresh
1
H
L
L
L
L
L
OPCODE Refer to operations in Function Truth Table
L
H
×
×
×
×
×
×
×
×
×
×
Exit power down next cycle
L
L
Power down
1
Row active
H
×
×
×
×
×
×
Refer to operations in Function Truth Table
L
×
×
×
×
×
×
Clock suspend
1
Any state other than
H
H
×
×
×
×
Refer to operations in Function Truth Table
listed above
H
L
×
×
×
×
×
Begin clock suspend next cycle
2
L
H
×
×
×
×
×
×
×
×
×
×
Exit clock suspend next cycle
Remark
:
H = VIH, L = VIL,
×
= VIH or VIL
Notes: 1. Self refresh can be entered only from the all banks idle state. Power down can be entered only from all
banks idle or row active state.
2. Must be legal command as defined in Function Truth Table.
L
L
Maintain clock suspend
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| EDS1232AABB-75L-E | 128M bits SDRAM |
| EDS1232CABB-75L-E | 128M bits SDRAM |
| EDS1232AATA-75L-E | 128M bits SDRAM (4M words x 32 bits) |
| EDS1232AABB-60-E | 128M bits SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDS1232AATA | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:128M bits SDRAM |
| EDS1232AATA-60 | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:128M bits SDRAM (4M words x 32 bits) |
| EDS1232AATA-60-E | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:128M bits SDRAM (4M words x 32 bits) |
| EDS1232AATA-60L | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:128M bits SDRAM |
| EDS1232AATA-60L-E | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:128M bits SDRAM (4M words x 32 bits) |
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