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參數(shù)資料
| 型號(hào)： | EDI88257LPA55CM |
| 元件分類(lèi)： | SRAM |
| 英文描述： | 256K X 8 STANDARD SRAM, 55 ns, CDIP32 |
| 封裝： | 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32 |
| 文件頁(yè)數(shù)： | 3/6頁(yè) |
| 文件大小： | 121K |
| 代理商： | EDI88257LPA55CM |
3
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
EDI88257CA
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
V
SS
to 3.0V
5ns
1.5V
Figure 1
NOTE:
For t
EHQZ
, t
GHQZ
and t
WLQZ
, CL = 5pF Figure 2)
30pF
480
Vcc
Q
Figure 1
Figure 2
255
5pF
480
Vcc
Q
255
AC TEST CONDITIONS
AC CHARACTERISTICS – READ CYCLE
(V
CC
= 5.0V, V
SS
= 0V, T
A
= -55
°
C to +125
°
C))
Symbol
20ns
25ns
35ns
45ns
55ns
Parameter
Read Cycle Time
JEDEC
t
AVAV
Alt.
t
RC
Min
20
Max
Min
25
Max
Min
35
Max
Min
45
Max
Min
55
Max
Units
ns
Address Access Time
Chip Select Access Time
Chip Select to Output in Low Z (1)
Chip Disable to Output in High Z (1)
Output Hold from Address Change
Output Enable to Output Valid
Output Enable to Output in Low Z (1)
Output Disable to Output in High Z (1)
1. This parameter is guaranteed by design but not tested.
t
AVQV
t
ELQV
t
ELQX
t
EHQZ
t
AVQX
t
GLQV
t
GLQX
t
GHQZ
t
AA
t
ACS
t
CLZ
t
CHZ
t
OH
t
OE
t
OLZ
t
OHZ
20
20
25
25
35
35
45
45
55
55
ns
ns
ns
ns
ns
ns
ns
ns
3
0
0
3
0
0
3
0
0
3
0
0
3
0
0
8
10
15
20
20
10
12
15
25
25
0
0
0
0
0
0
0
0
0
0
8
10
15
20
20
AC CHARACTERISTICS – WRITE CYCLE
(V
CC
= 5.0V, V
SS
= 0V, T
A
= -55
°
C to +125
°
C)
Symbol
20ns
25ns
35ns
45ns
55ns
Parameter
Write Cycle Time
Chip Select to End of Write
JEDEC
t
AVAV
t
ELWH
t
ELEH
t
AVWL
t
AVEL
t
AVWH
t
AVEH
t
WLWH
t
WLEH
Alt.
t
WC
t
CW
t
CW
t
AS
t
AS
t
AW
t
AW
t
WP
t
WP
Min
20
15
15
0
0
15
15
15
15
Max
Min
25
17
17
0
0
17
17
17
17
Max
Min
35
25
25
0
0
25
25
25
25
Max
Min
45
30
30
0
0
30
30
30
30
Max
Min
45
30
30
0
0
30
30
30
30
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Setup Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
t
WHAX
t
EHAX
t
WHDX
t
EHDX
t
WLQZ
t
DVWH
t
DVEH
t
WHQX
t
WR
t
WR
t
DH
t
DH
t
WHZ
t
DW
t
DW
t
WLZ
0
0
0
0
0
10
10
0
0
0
0
0
0
12
12
0
0
0
0
0
0
20
20
0
0
0
0
0
0
25
25
0
0
0
0
0
0
25
25
0
ns
ns
ns
ns
ns
ns
ns
ns
Data Hold Time
Write to Output in High Z (1)
Data to Write Time
8
10
25
30
30
Output Active from End of Write (1)
1. This parameter is guaranteed by design but not tested.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDI88257LPAXCB | 制造商:WEDC 制造商全稱(chēng):White Electronic Designs Corporation 功能描述:256Kx8 Monolithic SRAM |
| EDI88257LPAXCC | 制造商:WEDC 制造商全稱(chēng):White Electronic Designs Corporation 功能描述:256Kx8 Monolithic SRAM |
| EDI88257LPAXCI | 制造商:WEDC 制造商全稱(chēng):White Electronic Designs Corporation 功能描述:256Kx8 Monolithic SRAM |
| EDI88257LPAXCM | 制造商:WEDC 制造商全稱(chēng):White Electronic Designs Corporation 功能描述:256Kx8 Monolithic SRAM |
| EDI88257LPXCB | 制造商:WEDC 制造商全稱(chēng):White Electronic Designs Corporation 功能描述:256Kx8 Monolithic SRAM |
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