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參數(shù)資料
| 型號(hào)： | EDI88257LPA45CI |
| 元件分類： | SRAM |
| 英文描述： | 256K X 8 STANDARD SRAM, 45 ns, CDIP32 |
| 封裝： | 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32 |
| 文件頁(yè)數(shù)： | 4/6頁(yè) |
| 文件大?。?/td> | 121K |
| 代理商： | EDI88257LPA45CI |
4
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
EDI88257CA
ADDRESS
DATA I/O
READ CYCLE 1 (WE HIGH; OE, CS LOW)
t
AVQX
t
AVQV
t
AVAV
DATA 2
ADDRESS 1
ADDRESS 2
DATA 1
ADDRESS
DATA OUT
READ CYCLE 2 (WE HIGH)
t
AVQV
t
ELQV
t
GLQV
t
GLQX
t
ELQX
t
AVAV
t
EHQZ
t
GHQZ
OE
CS
WS32K32-XHX
FIG. 2
TIMING WAVEFORM - READ CYCLE
FIG. 4
WRITE CYCLE - CS CONTROLLED
FIG. 3
WRITE CYCLE - WE CONTROLLED
ADDRESS
DATA IN
WRITE CYCLE 2, CS CONTROLLED
t
AVEH
t
ELEH
t
EHAX
t
WLEH
t
DVEH
t
EHDX
t
AVAV
DATA VALID
HIGH Z
WE
CS
DATA OUT
t
AVEL
ADDRESS
DATA IN
WRITE CYCLE 1, WE CONTROLLED
t
AVWH
t
ELWH
t
WHAX
t
WLWH
t
DVWH
t
WLQZ
t
WHQX
t
AVWL
t
WHDX
t
AVAV
DATA VALID
HIGH Z
WE
CS
DATA OUT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EDI88257LPA55CM | 256K X 8 STANDARD SRAM, 55 ns, CDIP32 |
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| EDI8F1664CA30M6C | 128K X 8 MULTI DEVICE SRAM MODULE, 30 ns, DMA40 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDI88257LPAXCB | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:256Kx8 Monolithic SRAM |
| EDI88257LPAXCC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:256Kx8 Monolithic SRAM |
| EDI88257LPAXCI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:256Kx8 Monolithic SRAM |
| EDI88257LPAXCM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:256Kx8 Monolithic SRAM |
| EDI88257LPXCB | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:256Kx8 Monolithic SRAM |
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