參數(shù)資料
型號(hào)： EBE11ED8ABFA
廠商： Elpida Memory, Inc.
英文描述： 1GB Unbuffered DDR2 SDRAM DIMM (128M words x 72 bits, 2 Ranks)
中文描述： 1GB的無(wú)緩沖DDR2 SDRAM DIMM內(nèi)存（128M的字× 72位，2個(gè)等級(jí)）
文件頁(yè)數(shù)： 1/22頁(yè)
文件大?。?/td> 175K
代理商： EBE11ED8ABFA
Document No. E0379E40 (Ver.4
.
0)
Date Published August 2004 (K) Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2003-2004
DATA SHEET
1GB Unbuffered DDR2 SDRAM DIMM
EBE11ED8ABFA
(128M words
×
72 bits, 2 Ranks)
Description
The EBE11ED8ABFA is 128M words
×
72 bits, 2 ranks
DDR2 SDRAM unbuffered module, mounting 18 pieces
of 512M bits DDR2 SDRAM sealed in FBGA (
μ
BGA
)
package. Read and write operations are performed at
the cross points of the CK and the /CK. This high-
speed data transfer is realized by the 4 bits prefetch-
pipelined architecture. Data strobe (DQS and /DQS)
both for read and write are available for high speed and
reliable data bus design. By setting extended mode
register, the on-chip Delay Locked Loop (DLL) can be
set enable or disable. This module provides high
density mounting without utilizing surface mount
technology. Decoupling capacitors are mounted
beside each FBGA (
μ
BGA) on the module board.
Note: Do not push the components or drop the
modules in order to avoid mechanical defects,
which may result in electrical defects.
Features
240-pin socket type dual in line memory module
(DIMM)
PCB height: 30.0mm
Lead pitch: 1.0mm
Lead-free
1.8V power supply
Data rate: 533Mbps/400Mbps (max.)
1.8V (SSTL_18 compatible) I/O
Double-data-rate architecture: two data transfers per
clock cycle
Bi-directional, differential data strobe (DQS and
/DQS) is transmitted/received with data, to be used in
capturing data at the receiver
DQS is edge aligned with data for READs: center-
aligned with data for WRITEs
Differential clock inputs (CK and /CK)
DLL aligns DQ and DQS transitions with CK
transitions
Commands entered on each positive CK edge: data
and data mask referenced to both edges of DQS
Four internal banks for concurrent operation
(Component)
Data mask (DM) for write data
Burst lengths: 4, 8
/CAS Latency (CL): 3, 4, 5
Auto precharge operation for each burst access
Auto refresh and self refresh modes
7.8
μ
s average periodic refresh interval
Posted CAS by programmable additive latency for
better command and data bus efficiency
Off-Chip-Driver Impedance Adjustment and On-Die-
Termination for better signal quality
/DQS can be disabled for single-ended Data Strobe
operation
相關(guān)PDF資料
PDF描述
EBE11ED8AGFA-4A-E 1GB Unbuffered DDR2 SDRAM DIMM (128M words x 72 bits, 2 Ranks)
EBE11ED8AGFA-5C-E 1GB Unbuffered DDR2 SDRAM DIMM (128M words x 72 bits, 2 Ranks)
EBE11ED8AGFA-6E-E 1GB Unbuffered DDR2 SDRAM DIMM (128M words x 72 bits, 2 Ranks)
EBE11ED8ABFA-5C-E 1GB Unbuffered DDR2 SDRAM DIMM (128M words x 72 bits, 2 Ranks)
EBE11ED8AEFA Circular Connector; No. of Contacts:5; Series:MS27466; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Socket; Circular Shell Style:Wall Mount Receptacle RoHS Compliant: No
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EBE11ED8ABFA-4A-E 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:1GB Unbuffered DDR2 SDRAM DIMM (128M words x 72 bits, 2 Ranks)
EBE11ED8ABFA-5C-E 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:1GB Unbuffered DDR2 SDRAM DIMM (128M words x 72 bits, 2 Ranks)
EBE11ED8AEFA 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:1GB Unbuffered DDR2 SDRAM DIMM (128M words x 72 bits, 2 Ranks)
EBE11ED8AEFA-4A-E 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:1GB Unbuffered DDR2 SDRAM DIMM (128M words x 72 bits, 2 Ranks)
EBE11ED8AEFA-5C-E 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:1GB Unbuffered DDR2 SDRAM DIMM (128M words x 72 bits, 2 Ranks)
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