
 100
SAM4CP [DATASHEET]
43051E–ATPL–08/14
When PC is in 
reglist
 in an LDM instruction:
Bit[0] of the value loaded to the PC must be 1 for correct execution, and a branch occurs to this halfword-aligned
address.
If the instruction is conditional, it must be the last instruction in the IT block.
Condition Flags
These instructions do not change the flags.
Examples
  LDM     R8,{R0,R2,R9}      ; LDMIA is a synonym for LDM
  STMDB   R1!,{R3-R6,R11,R12}
Incorrect Examples
  STM     R5!,{R5,R4,R9}     ; Value stored for R5 is unpredictable 
  LDM     R2, {}             ; There must be at least one register in the list
12.6.4.7 PUSH and POP
Push registers onto, and pop registers off a full-descending stack.
Syntax
PUSH{
cond
} 
reglist
POP{
cond
} 
reglist
where:
cond
is an optional condition code, see 
“Conditional Execution”
.
reglist
is a non-empty list of registers, enclosed in braces. It can contain register ranges. It must be comma
separated if it contains more than one register or register range.
PUSH and POP are synonyms for STMDB and LDM (or LDMIA) with the memory addresses for the access based on SP,
and with the final address for the access written back to the SP. PUSH and POP are the preferred mnemonics in these
cases.
Operation
PUSH stores registers on the stack in order of decreasing the register numbers, with the highest numbered register using
the highest memory address and the lowest numbered register using the lowest memory address.
POP loads registers from the stack in order of increasing register numbers, with the lowest numbered register using the
lowest memory address and the highest numbered register using the highest memory address. 
See 
“LDM and STM”
 for more information.
Restrictions
In these instructions:
reglist
 must not contain SP.
For the PUSH instruction, 
reglist
 must not contain PC.
For the POP instruction, 
reglist
 must not contain PC if it contains LR.
When PC is in 
reglist
 in a POP instruction:
Bit[0] of the value loaded to the PC must be 1 for correct execution, and a branch occurs to this halfword-aligned
address.
If the instruction is conditional, it must be the last instruction in the IT block.
Condition Flags
These instructions do not change the flags.