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| 型號(hào)： | DT28F800F3T95 |
| 廠商： | INTEL CORP |
| 元件分類(lèi)： | DRAM |
| 英文描述： | FAST BOOT BLOCK FLASH MEMORY FAMILY 8 AND 16 MBIT |
| 中文描述： | 512K X 16 FLASH 2.7V PROM, 95 ns, PDSO56 |
| 封裝： | 16 X 23.70 MM, SSOP-56 |
| 文件頁(yè)數(shù)： | 40/47頁(yè) |
| 文件大?。?/td> | 277K |
| 代理商： | DT28F800F3T95 |
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FAST BOOT BLOCK DATASHEET
E
40
PRODUCT PREVIEW
8.7
AC Characteristics
—Reset Operation—Extended Temperature
(A) Reset while device is in read mode
RST# (R)
V
IH
V
IL
P1
R20
RST# (R)
V
IH
V
IL
P1
P2
R20
RST# (R)
V
IH
V
IL
P1
P2
R20
(B) Reset during program or block erase, P1
≤
P2
(C) Reset during program or block erase, P1
≥
P2
Abort
Complete
Abort
Complete
Figure 21. AC Waveform for Reset Operation
Table 10. Reset Specifications
#
Symbol
Parameter
Notes
Min
Max
Unit
P1
t
PLPH
RST# Low to Reset During Read
(If RST# is tied to V
CC
, this specification is not
applicable)
2,4
100
ns
P2
t
PLRH
RST# Low to Reset during Block Erase or
Program
3,4
22
μs
NOTES:
1.
2.
3.
4.
These specifications are valid for all product versions (packages and speeds).
If t
PLPH
is < 100 ns the device may still reset but this is not guaranteed.
If RST# is asserted while a block erase or
word program operation is not executing, the reset will complete within 100 ns.
Sampled, but not 100% tested.
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