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  • 參數(shù)資料
    型號(hào): DSPIC33FJ32MC202-I/MM
    廠商: Microchip Technology
    文件頁數(shù): 53/76頁
    文件大?。?/td> 0K
    描述: IC DSPIC MCU/DSP 32K 28QFN
    產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
    特色產(chǎn)品: PIC24FJ/33FJ MCUs & dsPIC? DSCs
    標(biāo)準(zhǔn)包裝: 61
    系列: dsPIC™ 33F
    核心處理器: dsPIC
    芯體尺寸: 16-位
    速度: 40 MIP
    連通性: I²C,IrDA,LIN,SPI,UART/USART
    外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,電機(jī)控制 PWM,QEI,POR,PWM,WDT
    輸入/輸出數(shù): 21
    程序存儲(chǔ)器容量: 32KB(32K x 8)
    程序存儲(chǔ)器類型: 閃存
    RAM 容量: 2K x 8
    電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
    數(shù)據(jù)轉(zhuǎn)換器: A/D 6x10b/12b
    振蕩器型: 內(nèi)部
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 28-VQFN 裸露焊盤
    包裝: 管件
    產(chǎn)品目錄頁面: 652 (CN2011-ZH PDF)
    配用: AC164336-ND - MODULE SOCKET FOR PM3 28/44QFN
    DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
    DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
    2007-2012 Microchip Technology Inc.
    DS70283K-page 57
    dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
    REGISTER 5-1:
    NVMCON: FLASH MEMORY CONTROL REGISTER
    R/SO-0(1)
    R/W-0(1)
    U-0
    WR
    WREN
    WRERR
    bit 15
    bit 8
    U-0
    R/W-0(1)
    U-0
    R/W-0(1)
    ERASE
    —NVMOP<3:0>(2)
    bit 7
    bit 0
    Legend:
    SO = Settable Only bit
    R = Readable bit
    W = Writable bit
    U = Unimplemented bit, read as ‘0’
    -n = Value at POR
    ‘1’ = Bit is set
    ‘0’ = Bit is cleared
    x = Bit is unknown
    bit 15
    WR: Write Control bit
    1 = Initiates a Flash memory program or erase operation. The operation is self-timed and the bit is
    cleared by hardware once operation is complete
    0 = Program or erase operation is complete and inactive
    bit 14
    WREN: Write Enable bit
    1 = Enable Flash program/erase operations
    0 = Inhibit Flash program/erase operations
    bit 13
    WRERR: Write Sequence Error Flag bit
    1 = An improper program or erase sequence attempt or termination has occurred (bit is set
    automatically on any set attempt of the WR bit)
    0 = The program or erase operation completed normally
    bit 12-7
    Unimplemented: Read as ‘0’
    bit 6
    ERASE: Erase/Program Enable bit
    1 = Perform the erase operation specified by NVMOP<3:0> on the next WR command
    0 = Perform the program operation specified by NVMOP<3:0> on the next WR command
    bit 5-4
    Unimplemented: Read as ‘0’
    bit 3-0
    NVMOP<3:0>: NVM Operation Select bits(2)
    If ERASE = 1:
    1111 = Memory bulk erase operation
    1101 = Erase General Segment
    1100 = Erase Secure Segment
    0011 = No operation
    0010 = Memory page erase operation
    0001 = No operation
    0000 = Erase a single Configuration register byte
    If ERASE = 0:
    1111 = No operation
    1101 = No operation
    1100 = No operation
    0011 = Memory word program operation
    0010 = No operation
    0001 = Memory row program operation
    0000 = Program a single Configuration register byte
    Note 1: These bits can only be Reset on a POR.
    2: All other combinations of NVMOP<3:0> are unimplemented.
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