參數(shù)資料
型號: DSPIC33FJ256MC510-I/PF
廠商: Microchip Technology
文件頁數(shù): 131/136頁
文件大小: 0K
描述: IC DSPIC MCU/DSP 256K 100TQFP
產(chǎn)品培訓模塊: dsPIC33F DMAC
Introduction to dsPIC33F Architecture Part 1
Asynchronous Stimulus
Introduction to dsPIC33F Architecture Part 2
特色產(chǎn)品: PIC24FJ/33FJ MCUs & dsPIC? DSCs
標準包裝: 90
系列: dsPIC™ 33F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 40 MIP
連通性: CAN,I²C,IrDA,LIN,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復位,DMA,電機控制 PWM,QEI,POR,PWM,WDT
輸入/輸出數(shù): 85
程序存儲器容量: 256KB(256K x 8)
程序存儲器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 24x10b/12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 654 (CN2011-ZH PDF)
配用: MA330013-ND - MODULE PLUG-IN DSPIC33 100TQFP
DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
AC164323-ND - MODULE SKT FOR 100TQFP
94
4235K–8051–05/08
AT89C51RD2/ED2
24.3
Flash Registers and Memory Map
The AT89C51RD2/ED2 Flash memory uses several registers for its management:
Hardware register can only be accessed through the parallel programming modes which are
handled by the parallel programmer.
Software registers are in a special page of the Flash memory which can be accessed through
the API or with the parallel programming modes. This page, called "Extra Flash Memory", is
not in the internal Flash program memory addressing space.
24.3.1
Hardware Register
The only hardware register of the AT89C51RD2/ED2 is called Hardware Byte or Hardware
Security Byte (HSB).
Table 24-1.
Hardware Security Byte (HSB)
Boot Loader Jump Bit (BLJB)
One bit of the HSB, the BLJB bit, is used to force the boot address:
When this bit is programmed (‘0’ value) the boot address is F800h.
When this bit is unprogrammed (‘1’ value) the boot address is 0000h.
By default, this bit is programmed and the ISP is enabled.
24.3.2
Flash Memory Lock Bits
The three lock bits provide different levels of protection for the on-chip code and data when pro-
grammed as shown in Table 24-2.
7
6
5
4
3
2
1
0
X2
BLJB
-
XRAM
LB2
LB1
LB0
Bit
Number
Bit
Mnemonic
Description
7
X2
X2 Mode
Programmed (‘0’ value) to force X2 mode (6 clocks per instruction) after reset.
Unprogrammed (‘1’ Value) to force X1 mode, Standard Mode, after reset (Default).
6
BLJB
Boot Loader Jump Bit
Unprogrammed (‘1’ value) to start the user’s application on next reset at address 0000h.
Programmed (‘0’ value) to start the boot loader at address F800h on next reset (Default).
5
-
Reserved
4
-
Reserved
3
XRAM
XRAM config bit (only programmable by programmer tools)
Programmed to inhibit XRAM.
Unprogrammed, this bit to valid XRAM (Default).
2-0
LB2-0
User Memory Lock Bits (only programmable by programmer tools)
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dsPIC33FJ256MC710A-E/PF 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16Bit 40MIPS 256KB Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
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