參數(shù)資料
型號： DSPIC30F5016-30I/PT
廠商： Microchip Technology
文件頁數(shù)： 51/129頁
文件大小： 0K
描述： IC DSPIC MCU/DSP 66K 80TQFP
產品培訓模塊： dsPIC30F Quadrature Encoder Interface
Serial Communications using dsPIC30F CAN
Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
標準包裝： 119
系列： dsPIC™ 30F
核心處理器： dsPIC
芯體尺寸： 16-位
速度： 30 MIP
連通性： CAN，I²C，SPI，UART/USART
外圍設備： 高級欠壓探測/復位，電機控制 PWM，QEI，POR，PWM，WDT
輸入/輸出數(shù)： 68
程序存儲器容量： 66KB（22K x 24）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 2.5 V ~ 5.5 V
數(shù)據(jù)轉換器： A/D 16x10b
振蕩器型： 內部
工作溫度： -40°C ~ 85°C
封裝/外殼： 80-TQFP
包裝： 托盤
產品目錄頁面： 651 (CN2011-ZH PDF)
配用： AC164320-ND - MODULE SKT MPLAB PM3 80TQFP
AC30F007-ND - MODULE SKT FOR DSPIC30F 80TQFP
DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE
其它名稱： DSPIC30F501630IPT
dsPIC30F5015/5016
DS70149D-page 28
2008 Microchip Technology Inc.
FIGURE 3-4:
PROGRAM DATA TABLE ACCESS (MSB)
3.1.2
DATA ACCESS FROM PROGRAM
MEMORY USING PROGRAM SPACE
VISIBILITY
The upper 32 Kbytes of data space may optionally be
mapped into any 16K word program space page. This
provides transparent access of stored constant data
from X data space, without the need to use special
instructions (i.e., TBLRDL/H, TBLWTL/H instructions).
Program space access through the data space occurs
if the MSb of the data space EA is set and program
space visibility is enabled, by setting the PSV bit in the
Core Control register (CORCON). The functions of
CORCON are discussed in Section 2.4 “DSP
Data accesses to this area add an additional cycle to
the instruction being executed, since two program
memory fetches are required.
Note that the upper half of addressable data space is
always part of the X data space. Therefore, when a
DSP operation uses program space mapping to access
this memory region, Y data space should typically
contain state (variable) data for DSP operations,
whereas X data space should typically contain
coefficient (constant) data.
Although each data space address, 0x8000 and higher,
maps directly into a corresponding program memory
address (see Figure 3-5), only the lower 16 bits of the
24-bit program word are used to contain the data. The
upper 8 bits should be programmed to force an illegal
instruction to maintain machine robustness. Refer
to the
“dsPIC30F/33F
Programmer’s
Reference
Manual” (DS70157) for details on instruction encoding.
Note that by incrementing the PC by 2 for each
program memory word, the Least Significant 15 bits of
data space addresses directly map to the Least
Significant 15 bits in the corresponding program space
addresses. The remaining bits are provided by the
Program Space Visibility Page register, PSVPAG<7:0>,
as shown in Figure 3-5.
For instructions which use PSV that are executed
outside a REPEAT loop:
The following instructions will require one
instruction cycle in addition to the specified
execution time:
- MAC class of instructions with data operand
prefetch
- MOV instructions
- MOV.D instructions
All other instructions will require two instruction
cycles in addition to the specified execution time
of the instruction.
For instructions that use PSV which are executed
inside a REPEAT loop:
The following instances will require two instruction
cycles in addition to the specified execution time
of the instruction:
- Execution in the first iteration
- Execution in the last iteration
- Execution prior to exiting the loop due to an
interrupt
- Execution upon re-entering the loop after an
interrupt is serviced
Any other iteration of the REPEAT loop will allow
the instruction, accessing data using PSV, to
execute in a single cycle.
0
8
16
PC Address
0x000000
0x000002
0x000004
0x000006
23
00000000
Program Memory
‘Phantom’ Byte
(Read as ‘0’)
TBLRDH.W
TBLRDH.B (Wn<0> = 1)
TBLRDH.B (Wn<0> = 0)
Note:
PSV access is temporarily disabled during
table reads/writes.
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