參數(shù)資料
型號(hào): DSPIC30F3013-20I/SP
廠商: Microchip Technology
文件頁數(shù): 126/161頁
文件大小: 0K
描述: IC DSPIC MCU/DSP 24K 28DIP
產(chǎn)品培訓(xùn)模塊: Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
標(biāo)準(zhǔn)包裝: 15
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 20 MIPS
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 20
程序存儲(chǔ)器容量: 24KB(8K x 24)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-DIP(0.300",7.62mm)
包裝: 管件
其它名稱: DSPIC30F301320ISP
dsPIC30F2011/2012/3012/3013
DS70139G-page 52
2010 Microchip Technology Inc.
5.6.3
LOADING WRITE LATCHES
Example 5-2 shows a sequence of instructions that
can be used to load the 96 bytes of write latches. 32
TBLWTL
and 32 TBLWTH instructions are needed to
load the write latches selected by the Table Pointer.
5.6.4
INITIATING THE PROGRAMMING
SEQUENCE
For protection, the write initiate sequence for NVMKEY
must be used to allow any erase or program operation
to proceed. After the programming command has been
executed, the user must wait for the programming time
until programming is complete. The two instructions
following the start of the programming sequence
should be NOPs as shown in Example 5-3.
EXAMPLE 5-2:
LOADING WRITE LATCHES
EXAMPLE 5-3:
INITIATING A PROGRAMMING SEQUENCE
; Set up a pointer to the first program memory location to be written
; program memory selected, and writes enabled
MOV
#0x0000,W0
;
MOV
W0,TBLPAG
; Initialize PM Page Boundary SFR
MOV
#0x6000,W0
; An example program memory address
; Perform the TBLWT instructions to write the latches
; 0th_program_word
MOV
#LOW_WORD_0,W2
;
MOV
#HIGH_BYTE_0,W3
;
TBLWTL
W2,[W0]
; Write PM low word into program latch
TBLWTH
W3,[W0++]
; Write PM high byte into program latch
; 1st_program_word
MOV
#LOW_WORD_1,W2
;
MOV
#HIGH_BYTE_1,W3
;
TBLWTL
W2,[W0]
; Write PM low word into program latch
TBLWTH
W3,[W0++]
; Write PM high byte into program latch
;
2nd_program_word
MOV
#LOW_WORD_2,W2
;
MOV
#HIGH_BYTE_2,W3
;
TBLWTL
W2, [W0]
; Write PM low word into program latch
TBLWTH
W3, [W0++]
; Write PM high byte into program latch
; 31st_program_word
MOV
#LOW_WORD_31,W2
;
MOV
#HIGH_BYTE_31,W3
;
TBLWTL
W2, [W0]
; Write PM low word into program latch
TBLWTH
W3, [W0++]
; Write PM high byte into program latch
Note:
In Example 5-2, the contents of the upper byte of W3 has no effect.
DISI
#5
; Block all interrupts with priority <7 for
; next 5 instructions
MOV
#0x55,W0
;
MOV
W0,NVMKEY
; Write the 0x55 key
MOV
#0xAA,W1
;
MOV
W1,NVMKEY
; Write the 0xAA key
BSET
NVMCON,#WR
; Start the erase sequence
NOP
; Insert two NOPs after the erase
NOP
; command is asserted
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