參數(shù)資料
型號: DSPIC30F2012T-20I/ML
廠商: Microchip Technology
文件頁數(shù): 52/66頁
文件大?。?/td> 0K
描述: IC DSPIC MCU/DSP 12K 28QFN
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
標(biāo)準(zhǔn)包裝: 1,600
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 20 MIPS
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 20
程序存儲(chǔ)器容量: 12KB(4K x 24)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-VQFN 裸露焊盤
包裝: 帶卷 (TR)
dsPIC30F Flash Programming Specification
DS70102K-page 56
2010 Microchip Technology Inc.
12.2
Programming Verification
After
the
programming
executive
has
been
programmed to executive memory using ICSP, it must
be verified. Verification is performed by reading out the
contents of executive memory and comparing it with
the image of the programming executive stored in the
programmer.
Reading the contents of executive memory can be
performed using the same technique described in
A
procedure for reading executive memory is shown in
Table 12-2. Note that in Step 2, the TBLPAG register is
set to 0x80 such that executive memory may be read.
TABLE 12-2:
READING EXECUTIVE MEMORY
Command
(Binary)
Data
(Hexadecimal)
Description
Step 1: Exit the Reset vector.
0000
040100
000000
GOTO 0x100
NOP
Step 2: Initialize TBLPAG and the read pointer (W6) for TBLRD instruction.
0000
200800
880190
EB0300
MOV
#0x80, W0
MOV
W0, TBLPAG
CLR
W6
Step 3: Initialize the write pointer (W7), and store the next four locations of executive memory to W0:W5.
0000
EB0380
000000
BA1B96
000000
BADBB6
000000
BADBD6
000000
BA1BB6
000000
BA1B96
000000
BADBB6
000000
BADBD6
000000
BA1BB6
000000
CLR
W7
NOP
TBLRDL
[W6], [W7++]
NOP
TBLRDH.B
[W6++], [W7++]
NOP
TBLRDH.B
[++W6], [W7++]
NOP
TBLRDL
[W6++], [W7++]
NOP
TBLRDL
[W6], [W7++]
NOP
TBLRDH.B
[W6++], [W7++]
NOP
TBLRDH.B
[++W6], [W7++]
NOP
TBLRDL
[W6++], [W7]
NOP
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