參數(shù)資料
型號(hào): DSPB56374AEC
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 18/64頁(yè)
文件大?。?/td> 0K
描述: IC DSP 24BIT 150MHZ 52-LQFP
產(chǎn)品變化通告: Product Discontinuation 24/Feb/2012
標(biāo)準(zhǔn)包裝: 160
系列: DSP56K/Symphony
類(lèi)型: 音頻處理器
接口: 主機(jī)接口,I²C,SAI,SPI
時(shí)鐘速率: 150MHz
非易失內(nèi)存: ROM(84 kB)
芯片上RAM: 54kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.25V
工作溫度: -40°C ~ 110°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 52-LQFP
供應(yīng)商設(shè)備封裝: 52-LQFP(10x10)
包裝: 托盤(pán)
Maximum Ratings
DSP56374 Data Sheet, Rev. 4.2
Freescale Semiconductor
25
4.11 JTAG/OnCE Interface
5
Maximum Ratings
CAUTION
This device contains circuitry protecting against damage due to high static voltage
or electrical fields. However, normal precautions should be taken to avoid
exceeding maximum voltage ratings. Reliability of operation is enhanced if unused
inputs are pulled to an appropriate logic voltage level (e.g., either GND or VDD).
The suggested value for a pullup or pulldown resistor is 4.7 k
.
PLOCK
Output
PLOCK—When this pin is configured as a PLL lock pin, this signal is
asserted high when the on-chip PLL enabled and locked and
de-asserted when the PLL enabled and unlocked. This pin is also
asserted high when the PLL is disabled.
Internal Pull down resistor.
This input is 5 V tolerant
Table 14. JTAG/OnCE Interface
Signal
Name
Signal
Type
State
during
Reset
Signal Description
TCK
Input
Test Clock—TCK is a test clock input signal used to synchronize the JTAG test
logic.
Internal Pull up resistor.
This input is 5 V tolerant.
TDI
Input
Test Data Input—TDI is a test data serial input signal used for test instructions
and data. TDI is sampled on the rising edge of TCK.
Internal Pull up resistor.
This input is 5 V tolerant.
TDO
Output
Tri-stated
Test Data Output—TDO is a test data serial output signal used for test
instructions and data. TDO is tri-statable and is actively driven in the shift-IR
and shift-DR controller states. TDO changes on the falling edge of TCK.
TMS
Input
Test Mode Select—TMS is an input signal used to sequence the test
controller’s state machine. TMS is sampled on the rising edge of TCK.
Internal Pull up resistor.
This input is 5 V tolerant.
Table 13. Timer Signal (continued)
Signal
Name
Type
State
during
Reset
Signal Description
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